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151.
Studies on metabolism of total glucosides of paeony from Paeoniae Radix Alba in rats by UPLC‐Q‐TOF‐MS/MS
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Wenli Cao Xinguo Wang Haojie Li Xuliang Shi Wencheng Fan Shaohua Zhao Minyan Liu Liying Niu 《Biomedical chromatography : BMC》2015,29(11):1769-1779
Total glucosides of paeony are the active constituents of Paeoniae Radix Alba. In this study, a novel strategy was proposed to find more metabolites and the differences between paeoniflorin, albiflorin and total glucosides of paeony (TGP). This strategy was characterized as follows: firstly, the animals were divided into three groups (paeoniflorin, albiflorin and TGP) to identify the source of TGP metabolites from paeoniflorin or albiflorin; secondly, a generic information‐dependent acquisition scan for the low‐level metabolites was triggered by the multiple mass defect filter and dynamic background subtraction; thirdly, the metabolites were identified with a combination of data‐processing methods including mass defect filtering, neutral loss filtering and product ion filtering; finally, a comparative study was used in the metabolism of paeoniflorin, albiflorin and TGP. Based on the strategy, 18 metabolites of TGP, 10 metabolites of paeoniflorin and 13 metabolites of albiflorin were identified respectively. The results indicated that the hydrolysis, conjugation reaction and oxidization were the major metabolic pathways, and the metabolic sites were the glycosidic linkage, the ester bond and the benzene ring. This study is first to explore the metabolism of TGP, and these findings enhance our understanding of the metabolism and the interactions of paeoniflrin and albiflorin in TGP. Copyright © 2015 John Wiley & Sons, Ltd. 相似文献
152.
Locke Davenport Huyer Serena Mandla Yufeng Wang Scott B. Campbell Bess Yee Christian Euler Benjamin F. Lai A. Dawn Bannerman Dawn S. Y. Lin Miles Montgomery Kayla Nemr Timothy Bender Slava Epelman Radhakrishnan Mahadevan Milica Radisic 《Advanced functional materials》2021,31(6):2003341
Itaconate (ITA) is an emerging powerhouse of innate immunity with therapeutic potential that is limited in its ability to be administered in a soluble form. A library of polyester materials that incorporate ITA into polymer backbones resulting in materials with inherent immunoregulatory behavior is developed. Harnessing hydrolytic degradation release from polyester backbones, ITA polymers result in the mechanism specific immunoregulatory properties on macrophage polarization in vitro. In a functional assay, the polymer-released ITA inhibits bacterial growth on acetate. Translation to an in vivo model of biomaterial associated inflammation, intraperitoneal injection of ITA polymers demonstrate a rapid resolution of inflammation in comparison to a control polymer silicone, demonstrating the value of sustained biomimetic presentation of ITA. 相似文献
153.
Guangrui Chen Yuxing Yan Dr. Jie Wang Prof. Yong Sik Ok Guiyuan Zhong Prof. Bu Yuan Guan Prof. Yusuke Yamauchi 《Angewandte Chemie (Weinheim an der Bergstrasse, Germany)》2020,132(44):19831-19836
Mesoporous core–shell nanostructures with controllable ultra-large open channels in their nanoshells are of great interest. However, soft template-directed cooperative assembly to mesoporous nanoshells with highly accessible pores larger than 30 nm, or even above 50 nm into macroporous range, remains a significant challenge. Herein we report a general approach for precisely tailored coating of hierarchically macro-/mesoporous polymer and carbon shells, possessing highly accessible radial channels with extremely wide pore size distribution from ca. 10 nm to ca. 200 nm, on diverse functional materials. This strategy creates opportunities to tailor the interfacial assembly of irregular mesostructured nanounits on core materials and generate various core–shell nanomaterials with controllable pore architectures. The obtained Fe,N-doped macro-/mesoporous carbon nanoshells show enhanced electrochemical performance for the oxygen reduction reaction in alkaline condition. 相似文献
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155.
Yang Aiying Wang Ziyu Zhang Zhaoyi Chen Zhangyuan Wu Deming 《电子科学学刊(英文版)》2003,20(6):461-466
A 10Gbit/s recirculating system is configured with Chirped Fiber Bragg Grating (CFBG) for the dispersion compensation. For the first time, the transmission distance in the loop reaches 1000km with bit error rate of 10-9. The effect of the group delay ripple of the fiber grating is also investigated in the recirculating systems, and it is shown that the transmission distance is limited to 4 cycles (4×167.1km ) in the loop with the power penalty fluctuation below 1.0dB. Thus the group delay ripple should be reduced to allow for the wavelength drift of±5GHz. At the end of this letter, the principles are given for designing long haul recirculating systems with dispersion compensation CFBG. 相似文献
156.
High-performance and power-efficient CMOS comparators 总被引:1,自引:0,他引:1
Chung-Hsun Huang Jinn-Shyan Wang 《Solid-State Circuits, IEEE Journal of》2003,38(2):254-262
Several design techniques for high-performance and power-efficient CMOS comparators are proposed. First, the comparator is based on the priority-encoding (PE) algorithm, and the dynamic circuit technique developed specifically for the priority encoder can be applied. Second, the PE function and the subsequent logic functions are merged and efficiently realized in the multiple output domino logic (MODL) to result in a shortened logic depth. The circuit in MODL CMOS is also compact and power efficient because few transistors are needed. Third, the multilevel look-ahead technique is used to shorten the path of priority-token propagation. Finally, the circuit is realized with a latch-based two-stage pipelined structure, and the comparison function is partitioned into two parts, with each part executed in each half of the clock cycle in a delay-balanced manner. Post-layout simulation results show that a 64-b comparator designed with the proposed techniques in a 3-V 0.6-/spl mu/m CMOS technology is 16% faster, 50% smaller, and 79% more power efficient as compared with the all-n-transistor comparator, which is the fastest among the conventional comparators. Measurement results of the test chip conform with simulation results and prove the feasibility of the proposed techniques. 相似文献
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158.
文章介绍了一种新型的短波跳频通信技术——差分跳频,分析了差分跳频技术区别于常规跳频技术的主要特点。针对按序列检测的信号接收方法,对差分跳频通信系统在AWGN信道下的性能进行了理论分析,同时做出相应的计算机仿真,证实了差分跳频通信技术和按序列检测方法的结合,使通信系统在AWGN信道下的性能得到了比较显著的提升。 相似文献
159.
160.
Analysis and architecture design of variable block-size motion estimation for H.264/AVC 总被引:1,自引:0,他引:1
Ching-Yeh Chen Shao-Yi Chien Yu-Wen Huang Tung-Chien Chen Tu-Chih Wang Liang-Gee Chen 《IEEE transactions on circuits and systems. I, Regular papers》2006,53(3):578-593
Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory. 相似文献