Electrospinning of ultrafine cellulose acetate fibers: Studies of a new solvent system and deacetylation of ultrafine cellulose acetate fibers

Electrospinning of cellulose acetate (CA) in a new solvent system and the deacetylation of the resulting ultrafine CA fibers were investigated. Ultrafine CA fibers (∼2.3 μm) were successfully prepared via electrospinning of CA in a mixed solvent of acetone/water at water contents of 10–15 wt %, and more ultrafine CA fibers (0.46 μm) were produced under basic pH conditions. Ultrafine cellulose fibers were regenerated from the homogeneous deacetylation of ultrafine CA fibers in KOH/ethanol. It was very rapid and completed within 20 min. The crystal structure, thermal properties, and morphology of ultrafine CA fibers were changed according to the degree of deacetylation, finally to those of pure cellulose, but the nonwoven fibrous mat structure was maintained. The activation energy for the deacetylation of ultrafine CA fibers was 10.3 kcal/mol. © 2003 Wiley Periodicals, Inc. J Polym Sci Part B: Polym Phys 42: 5–11, 2004     

Existence and uniform decay for Euler–Bernoulli beam equation with memory term

In this article we prove the existence of the solution to the mixed problem for Euler–Bernoulli beam equation with memory term. The existence is proved by means of the Faedo–Galerkin method and the exponential decay is obtained by making use of the multiplier technique combined with integral inequalities due to Komornik. Copyright © 2004 John Wiley & Sons, Ltd.     

Fast DCT algorithm with fewer multiplication stages

A novel fast DCT scheme with reduced multiplication stages and fewer additions and multiplications is proposed. The proposed algorithm is structured so that most multiplications tend to be performed at the final stage, which reduces the propagation error that could occur in the fixed-point computation. Minimisation of the multiplication stages can further decrease the error     

A real algorithm for the Hermitian eigenvalue decomposition

Modifying complex plane rotations, we derive a new Jacobi-type algorithm for the Hermitian eigendecomposition, which uses only real arithmetic. When the fast-scaled rotations are incorporated, the new algorithm brings a substantial reduction in computational costs. The new method has the same convergence properties and parallelism as the symmetric Jacobi algorithm. Computational test results show that it produces accurate eigenvalues and eigenvectors and achieves great reduction in computational time.The work of this author was supported in part by the National Science Foundation grant CCR-8813493 and by the University of Minnesota Army High Performance Computing Research Center contract DAAL 03-89-C-0038.The work of this author was supported in part by the University of Minnesota Army High Performance Computing Research Center contract DAAL 03-89-C-0038.     

Dielectric effect on the rf characteristics of a helical groove travelling wave tube

A new type of partial-dielectric-loaded helical groove slow-wave structure (SWS) for millimetre wave travelling wave tube (TWT） is presented in this paper.The radio-frequency characteristics including the dispersion properties,the longitudinal electric field distribution and the beam-wave coupling impedance of this structure are analysed.The results show that the dispersion of the helical groove circuit is weakened,the phase velocity is reduced and the position of the maximum Ez is moved from the mouth to the inside of the groove after partially filling the dielectric materials in the helical groove SWS.Therefore,the dielectric-loaded helical groove SWS is suitable for a multi-beam TWT with broad band and high gain.     

Self-aligned offset gated poly-Si TFTs with a floating sub-gate

We have fabricated a self-aligned offset-gated poly-Si thin film transistor (TFT) by employing a novel photoresist reflow process. The gate structure of the new device is consisted of two unique patterns: A main-gate and a sub-gate. The new fabrication method extends the gate-oxide over the offset region. With the assistance of the sub-gate and reflowed photoresist a self-aligned offset region is successfully obtained due to the offset oxide acting as an implantation mask. The poly-Si TFT with symmetrical offsets is easily fabricated and the new method does not require any additional offset mask step. Compared with the misaligned offset gated poly-Si TFTs, excellent symmetric electrical characteristics are obtained     

A possibility of parallel and anti-parallel diffraction measurements on neutron diffractometer employing bent perfect crystal monochromator at the monochromatic focusing condition

In a conventional diffractometer having single monochromator, only one position, parallel position, is used for the diffraction experiment (i.e. detection) because the resolution property of the other one, anti-parallel position, is very poor. However, a bent perfect crystal (BPC) monochromator at monochromatic focusing condition can provide a quite flat and equal resolution property at both parallel and anti-parallel positions and thus one can have a chance to use both sides for the diffraction experiment. From the data of the FWHM and the Δd/d measured on three diffraction geometries (symmetric, asymmetric compression and asymmetric expansion), we can conclude that the simultaneous diffraction measurement in both parallel and anti-parallel positions can be achieved.     

Generation of 0.2-TW 5.5-fs optical pulses at 1 kHz using a differentially pumped hollow-fiber chirped-mirror compressor

Optical pulses with 1.1-mJ energy and 5.5-fs duration have been generated at 1-kHz repetition rate from a chirped pulse amplification Ti:Sapphire laser incorporating a differentially pumped hollow-fiber chirped-mirror compressor. The effects of self-focusing and multi-photon ionization during the beam propagation were minimized by differentially pumping the hollow fiber filled with neon. The spectral broadening at the hollow-fiber compressor was optimized by adjusting gas pressure, laser intensity, and laser chirp, covering from 540 nm to 950 nm. PACS 42.65.Jx; 42.65.Re     

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor

A 4-MB L2 data cache was implemented for a 64-bit 1.6-GHz SPARC(r) RISC microprocessor. Static sense amplifiers were used in the SRAM arrays and for global data repeaters, resulting in robust and flexible timing operation. Elimination of the global clock grid over the SRAM array saves power, enabled by combining the clock information with array select signals. Redundancy was implemented flexibly, with shift circuits outside the main data array for area efficiency. The chip integrates 315 million transistors and uses an 8-metal-layer 90-nm CMOS process.     

A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer

This work presents a quad-channel serial-link transceiver providing a maximum full duplex raw data rate of 12.5Gb/s for a single 10-Gbit eXtended Attachment Unit Interface (XAUI) in a standard 0.18-/spl mu/m CMOS technology. To achieve low bit-error rate (BER) and high-speed operation, a mixed-mode least-mean-square (LMS) adaptive equalizer and a low-jitter delay-immune clock data recovery (CDR) circuit are used. The transceiver achieves BER lower than <4.5/spl times/10/sup -15/ while its transmitted data and recovered clock have a low jitter of 46 and 64 ps in peak-to-peak, respectively. The chip consumes 178 mW per each channel at 3.125-Gb/s/ch full duplex (TX/RX simultaneous) data rate from 1.8-V power supply.