High speed p-type SiGe modulation-doped field-effect transistors

We report on the fabrication and characterization of high-speed p-type modulation-doped field-effect transistors (MODFETs) with 0.7-μm and 1-μm gate-lengths having unity current-gain cut-off frequencies (f_T) of 9.5 GHz and 5.3 GHz, respectively. The devices were fabricated on a high hole mobility SiGe heterostructure grown by ultra-high-vacuum chemical vapor deposition (UHV-CVD). The dc maximum extrinsic transconductance (g_m) is 105 mS/mm (205 mS/mm) at room temperature (77 K) for the 0.7-μm gate length devices. The fabricated devices show good pinch-off characteristics and have a very low gate leakage current of a few μA/mm at room temperature and a few nA/mm at 77 K     

Genetic algorithms: concepts and applications [in engineeringdesign]

This paper introduces genetic algorithms (GA) as a complete entity, in which knowledge of this emerging technology can be integrated together to form the framework of a design tool for industrial engineers. An attempt has also been made to explain “why” and “when” GA should be used as an optimization tool     

On the RLSA antenna optimum design for DBS reception

An optimal design for the RLSA (radial line slot array) antenna useful for DBS reception is presented. Classical geometries and structures given in the literature are first used. It is found that in some cases these are not suitable. So, optimization techniques by using the right objective functions have been applied. Two different methods were developed and three antennas were designed. Numerical results and comparisons with other similar antennas give the advantages of our design     

Dynamic programming implementation on array processor architectures

Dynamic Programming (DP) applies to many signal and image processing applications including boundary following, the Viterbi algorithm, dynamic time warping, etc. This paper presents an array processor implementation of generic dynamic programming. Our architecture is a SIMD array attached to a host computer. The processing element of the architecture is based on an ASIC design opting for maximum speed-up. By adopting a torus interconnection network, a dual buffer structure, and a multilevel pipeline, the performance of the DP chip is expected to reach the order of several GOPS. The paper discusses both the dedicated hardware design and the data flow control of the DP chip and the total array.This work was supported in part by the NATO, Scientific and Environmental Affairs Division, Collaborative Research Grant SA.5-2-05(CRG.960201)424/96/JARC-501.     

Large signal analysis of the LCC-type parallel resonant converterusing discrete time domain modeling

A discrete time domain model for the LCC-type parallel resonant power converter has been derived. This model has been used to predict the large signal behavior of the power converter. The peak component stresses and the dynamic response of the key state variables, as obtained from the large signal analysis, using PRO-MATLAB software are plotted. SPICE results are included to verify the analytical results. Experimental results are also presented to verify the theory     

Design, manufacture and evaluation of a scalable high-performanceneural system

The authors describe a scalable neural system, HyperNet, based on a probabilistic RAM-based architecture and using a custom VLSI IC. A system using five HyperNet VLSI ICs and capable of realising up to 10240 neurons has been designed, manufactured and demonstrated to have the potential to learn more than three orders of magnitude faster than simulations on current workstations     

Guest Editors' Introduction: Haptic User Interfaces for Multimedia Systems

The guest editors talk a little about haptic interfaces and give an overview of the articles for this special issue.     

Fiber-optic devices for local area network application

Recent developments on fiber-optic devices are reviewed from the local area network (LAN) application viewpoint. Future technical trends are also discussed, along with current research activities. In local area network systems, low device cost and easy maintenance or maintenance-free devices are especially required. Light sources and photodetectors suitable for the systems are described. InGaAsP/InP light emitting diodes can cover a broad application field, up to a gigabits per second super high-speed network region. Optical passive devices, which include branching couplers, switches and connectors, are mentioned as essential components. Compact transmitter/receiver module technology is a key factor in realizing optical-fiber local area network systems. An example of 200-Mbit/s transmitter/receiver module is reported.