Inside Front Cover: The Elastic Properties and Plastic Behavior of Two‐Dimensional Polymer Structures Fabricated by Laser Interference Lithography (Adv. Funct. Mater. 10/2006)

The probing of the micromechanical properties within a two‐dimensional polymer structure with sixfold symmetry fabricated via interference lithography reveals a nonuniform spatial distribution in the elastic modulus “imprinted” with an interference pattern in work reported by Tsukruk, Thomas, and co‐workers on p. 1324. The image prepared by M. Lemieux and T. Gorishnyy shows how the interference pattern is formed by three laser beams and is transferred to the solid polymer structure. The elastic and plastic properties within a two‐dimensional polymer (SU8) structure with sixfold symmetry fabricated via interference lithography are presented. There is a nonuniform spatial distribution in the elastic modulus, with a higher elastic modulus obtained for nodes (brightest regions in the laser interference pattern) and a lower elastic modulus for beams (darkest regions in the laser interference pattern) of the photopatterned films. We suggest that such a nonuniformity and unusual plastic behavior are related to the variable material properties “imprinted” by the interference pattern.     

Design procedure of class-E amplifier for off-nominal operation at 50% duty ratio

Design equations for satisfying the off-nominal operating condition [i.e., only the zero-voltage switching (ZVS) condition] of the Class-E amplifier with a linear shunt capacitance at a duty ratio D=0.5 are derived. A new parameter s (V/s), called the slope of switch voltage when the switch turns on is introduced to obtain an image of the distance from the nominal conditions. By examining off-nominal Class-E operation degree of the design freedom of the Class-E amplifier increases by one. In addition various amplifier parameters such as operating frequency, output power, and load resistance range can be set as design specifications. For example, the peak switch voltage and switch current can be taken into account in the design procedure. Examples of a design procedure of the Class-E amplifier for off-nominal operation are given. The theoretical results were verified with PSpice simulation and experiments.     

A CMOS multichannel 10-Gb/s transceiver

We describe a CMOS multichannel transceiver that transmits and receives 10 Gb/s per channel over balanced copper media. The transceiver consists of two identical 10-Gb/s modules. Each module operates off a single 1.2-V supply and has a single 5-GHz phase-locked loop to supply a reference clock to two transmitter (Tx) channels and two receiver (Rx) channels. To track the input-signal phase, the Rx channel has a clock recovery unit (CRU), which uses a phase-interpolator-based timing generator and digital loop filter. The CRU can adjust the recovered clock phase with a resolution of 1.56 ps. Two sets of two-channel transceiver units were fabricated in 0.11-/spl mu/m CMOS on a single test chip. The transceiver unit size was 1.6 mm /spl times/ 2.6 mm. The Rx sensitivity was 120-mVp-p differential with a 70-ps phase margin for a common-mode voltage ranging from 0.6 to 1.0 V. The evaluated jitter tolerance curve met the OC-192 specification.     

Web Services Architecture

The underlying need for Web Services has been demonstrated by their early adoption and rapid evolution during the last few years. This evolution has resulted in a number of specifications being proposed that at first glance seem independent of one another. The current immaturity of the base technology and the growing number and diversity of specifications related to Web Services is sometimes seen as a barrier to developers attempting to combine them to create a working piece of software. For some, the apparent lack of stability and coherence in the specifications even raises the question of the real long-term viability and value of the technology. This document puts those specifications into perspective by describing the set of interoperable XML protocols that are the foundation of building interoperable systems, middleware, and applications. This revised version was published online in July 2006 with corrections to the Cover Date.     

Rate adaptive speech coding for universal multimedia access

This article reviews state-of-the-art in transport adaptation techniques for mobile networks. It discusses the mechanisms for rate adaptation to combat quality degradations of speech caused by the radio links. It begins with a review of dynamic schemes for adaptation of speech encoders in cellular networks where we observe two distinct approaches to rate adaptation: network controlled and source controlled. The issues associated with adaptive voice over IP (VoIP) mechanisms are considered next. Here, the encoder detects some form of network congestion to judge how to behave itself for the good of the network. It is noted that this altruistic behavior will only benefit coordinated IP networks such as private intranets and its application to the public Internet is improbable.     

Combined RLS-LMS initialization for per tone equalizers in DMT-receivers

In discrete multitone receivers, the classical equalizer structure consists of a (real) time domain equalizer (TEQ) combined with complex one-tap frequency domain equalizers. An alternative receiver is based on a per tone equalization (PTEQ), which optimizes the signal-to-noise ratio (SNR) on each tone separately and, hence, the total bitrate. In this paper, a new initialization scheme for the PTEQ is introduced, based on a combination of least mean squares (LMS) and recursive least squares (RLS) adaptive filtering. It is shown that the proposed method has only slightly slower convergence than full square-root RLS (SR-RLS) while complexity as well as memory cost are reduced considerably. Hence, in terms of complexity and convergence speed, the proposed algorithm is in between LMS and RLS.     

Theoretical analysis of cladding-mode waveguide dispersion and its effects on the spectra of long-period fiber grating

A new method to control the free spectral range (FSR) of a long-period fiber grating (LPFG) is proposed and theoretically analyzed. As the refractive index decreases radially outward in the silica cladding by graded doping of fluorine, waveguide dispersion in the cladding modes was modified to result in the effective indexes change and subsequently the phase-matching conditions for coupling with the core mode in a LPFG. Enlargement of the FSR in a LPFG was theoretically confirmed.     

Colloidal processing of polymer ceramic nanocomposite integral capacitors

Polymer ceramic composites form a suitable material system for low temperature fabrication of embedded capacitors appropriate for the MCM-L technology. Improved electrical properties such as permittivity can be achieved by efficient filling of polymers with high dielectric constant ceramic powders such as lead magnesium niobate-lead titanate (PMN-PT) and barium titanate (BT). Photodefinable epoxies as the matrix polymer allow fine feature definition of the capacitor elements by conventional lithography techniques. The optimum weight percent of dispersant is tuned by monitoring the viscosity of the suspension. The dispersion mechanism (steric and electrostatic contribution) in a slightly polar solvent such as propylene glycol methyl ether acetate (PGMEA) is investigated from electrophoretic measurements. A high positive zeta potential is observed in the suspension, which suggests a strong contribution of electrostatic stabilization. By optimizing the particle packing using a bimodal distribution and modified processing methodology, a dielectric constant greater than 135 was achieved in PMN-PT/epoxy system. Suspensions are made with the lowest PGMEA content to ensure the efficiency of the dispersion and efficient particle packing in the dried film. Improved colloidal processing of nanoparticle-filled epoxy is a promising method to obtain ultra-thin capacitor films (<2/spl mu/m) with high capacitance density and improved yield. Capacitance of 35 nF/cm/sup 2/ was achieved with the thinnest films (2.5-3.0 /spl mu/m).     

Contention-conscious transaction ordering in multiprocessor DSP systems

This paper explores the problem of efficiently ordering interprocessor communication (IPC) operations in statically scheduled multiprocessors for iterative dataflow graphs. In most digital signal processing (DSP) applications, the throughput of the system is significantly affected by communication costs. By explicitly modeling these costs within an effective graph-theoretic analysis framework, we show that ordered transaction schedules can significantly outperform self-timed schedules even when synchronization costs are low. However, we also show that when communication latencies are nonnegligible, finding an optimal transaction order given a static schedule is an NP-complete problem, and that this intractability holds both under iterative and noniterative execution. We develop new heuristics for finding efficient transaction orders, and perform an extensive experimental comparison to gauge the performance of these heuristics.     

Hf-doped and NH/sub 3/-nitrided high-K gate dielectric thin film with least drain current degradation and flatband voltage shift

A novel technique to form high-K dielectric of HfSiON by doping base oxide with Hf and nitridation with NH/sub 3/, sequentially, is proposed. The HfSiON gate dielectric demonstrates excellent device performances such as only 10% degradation of saturation drain current and almost 45 times of magnitude reduction in gate leakage compared with conventional SiO/sub 2/ gate at the approximately same equivalent oxide thickness. Additionally, negligible flatband voltage shift is achieved with this technique. Time-dependent dielectric breakdown tests indicate that the lifetime of HfSiON is longer than 10 years at V/sub dd/=2 V.