A real algorithm for the Hermitian eigenvalue decomposition

Modifying complex plane rotations, we derive a new Jacobi-type algorithm for the Hermitian eigendecomposition, which uses only real arithmetic. When the fast-scaled rotations are incorporated, the new algorithm brings a substantial reduction in computational costs. The new method has the same convergence properties and parallelism as the symmetric Jacobi algorithm. Computational test results show that it produces accurate eigenvalues and eigenvectors and achieves great reduction in computational time.The work of this author was supported in part by the National Science Foundation grant CCR-8813493 and by the University of Minnesota Army High Performance Computing Research Center contract DAAL 03-89-C-0038.The work of this author was supported in part by the University of Minnesota Army High Performance Computing Research Center contract DAAL 03-89-C-0038.     

Dielectric effect on the rf characteristics of a helical groove travelling wave tube

A new type of partial-dielectric-loaded helical groove slow-wave structure (SWS) for millimetre wave travelling wave tube (TWT） is presented in this paper.The radio-frequency characteristics including the dispersion properties,the longitudinal electric field distribution and the beam-wave coupling impedance of this structure are analysed.The results show that the dispersion of the helical groove circuit is weakened,the phase velocity is reduced and the position of the maximum Ez is moved from the mouth to the inside of the groove after partially filling the dielectric materials in the helical groove SWS.Therefore,the dielectric-loaded helical groove SWS is suitable for a multi-beam TWT with broad band and high gain.     

Self-aligned offset gated poly-Si TFTs with a floating sub-gate

We have fabricated a self-aligned offset-gated poly-Si thin film transistor (TFT) by employing a novel photoresist reflow process. The gate structure of the new device is consisted of two unique patterns: A main-gate and a sub-gate. The new fabrication method extends the gate-oxide over the offset region. With the assistance of the sub-gate and reflowed photoresist a self-aligned offset region is successfully obtained due to the offset oxide acting as an implantation mask. The poly-Si TFT with symmetrical offsets is easily fabricated and the new method does not require any additional offset mask step. Compared with the misaligned offset gated poly-Si TFTs, excellent symmetric electrical characteristics are obtained     

Generation of 0.2-TW 5.5-fs optical pulses at 1 kHz using a differentially pumped hollow-fiber chirped-mirror compressor

Optical pulses with 1.1-mJ energy and 5.5-fs duration have been generated at 1-kHz repetition rate from a chirped pulse amplification Ti:Sapphire laser incorporating a differentially pumped hollow-fiber chirped-mirror compressor. The effects of self-focusing and multi-photon ionization during the beam propagation were minimized by differentially pumping the hollow fiber filled with neon. The spectral broadening at the hollow-fiber compressor was optimized by adjusting gas pressure, laser intensity, and laser chirp, covering from 540 nm to 950 nm. PACS 42.65.Jx; 42.65.Re     

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor

A 4-MB L2 data cache was implemented for a 64-bit 1.6-GHz SPARC(r) RISC microprocessor. Static sense amplifiers were used in the SRAM arrays and for global data repeaters, resulting in robust and flexible timing operation. Elimination of the global clock grid over the SRAM array saves power, enabled by combining the clock information with array select signals. Redundancy was implemented flexibly, with shift circuits outside the main data array for area efficiency. The chip integrates 315 million transistors and uses an 8-metal-layer 90-nm CMOS process.     

A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer

This work presents a quad-channel serial-link transceiver providing a maximum full duplex raw data rate of 12.5Gb/s for a single 10-Gbit eXtended Attachment Unit Interface (XAUI) in a standard 0.18-/spl mu/m CMOS technology. To achieve low bit-error rate (BER) and high-speed operation, a mixed-mode least-mean-square (LMS) adaptive equalizer and a low-jitter delay-immune clock data recovery (CDR) circuit are used. The transceiver achieves BER lower than <4.5/spl times/10/sup -15/ while its transmitted data and recovered clock have a low jitter of 46 and 64 ps in peak-to-peak, respectively. The chip consumes 178 mW per each channel at 3.125-Gb/s/ch full duplex (TX/RX simultaneous) data rate from 1.8-V power supply.     

Synthesis of poly-substituted nitrobenzene derivatives from Baylis-Hillman adducts via [3+3] annulation protocol

Poly-substituted nitrobenzenes were synthesized from Baylis-Hillman adducts via the [3+3] annulation strategy as the key step. 1,3-Dinitroalkanes served as the 1,3-dinucleophilic component and the Baylis-Hillman acetates as a 1,3-dielectrophilic part.     

Fabrication of high current and low profile micromachined inductorwith laminated Ni/Fe core

A new process for the fabrication of high current and very low profile micromachined inductors has been developed. This process involves the combination of mechanical lamination and electrodeposition of copper windings by means of LIGA-like lithography through thick epoxy photoresists. The dimension of the fabricated inductor is 16 mm×19 mm×1 mm. The fabricated inductor has an inductance value of 1.2 μH with DC saturation current of 3 A and an electrical resistance of less than 30 mΩ at 10 kHz     

A novel phase noise reduction technique in oscillators usingdefected ground structure

A new technique to reduce the phase noise in microwave oscillators is developed using the resonant characteristic of the defected ground structure (DGS). Two kinds of oscillators have been designed and measured for the examination of the reduction of phase noise by the DGS. The first adopts the DGS section under the microstrip line at the gate circuit, while the second has only the conventional microstrip line. Measurement shows reduced phase noise by 10-15 dB in the oscillator with the DGS compared to the conventional one     

Cellulose dimethylphenylcarbamate-bonded carbon-clad zirconia for chiral separation in high performance liquid chromatography.

Porous zirconia particles are very robust material and have received considerable attention as a stationary phase support for HPLC. We prepared cellulose dimethylphenylcarbamate-bonded carbon-clad zirconia (CDMPCCZ) as a chiral stationary phase (CSP) for separation of enantiomers of a set of 14 racemic compounds in normal phase (NP) and reversed-phase (RP) liquid chromatography. Retention and enantioselectivity on CDMPCCZ were compared to those on CDMPC-coated zirconia (CDMPCZ) to see how the change in immobilization method of the chiral selector affects the retention and chiral selectivity. In NPLC, retention was longer and the number of resolved racemates was smaller on CDMPCCZ than on CDMPCZ. However, chiral selectivity factors for some resolved racemates were better on CDMPCCZ than on CDMPCZ. The longer retention on CDMPCCZ is likely due to strong, non-chiral discriminating interactions with the carbon layer on CDMPCZ. In RPLC only two racemates were resolved on CDMPCCZ, but retention times were shorter than, and resolutions were comparable to, those in NPLC, indicating a potential for improving chromatographic performance of the CDMPCCZ column in RPLC with optimized column preparation and separation conditions.