Scaling planar silicon devices

The generation-over-generation scaling of critical CMOS technology parameters is ultimately bound by nonscalable limitations, such as the thermal voltage and the elementary electronic charge. Sustained improvement in performance and density has required the introduction of new device structures and materials. Partially depleted SOI, a most recent MOSFET innovation, has extended VLSI performance while introducing unique idiosyncrasies. Fully depleted SOI is one logical extension of this device design direction. Gate dielectric tunneling, device self-heating, and single-event upsets present developers of these next-generation devices with new challenges. Strained silicon and high-permittivity gate dielectric are examples of new materials that will enable CMOS developers to continue to deliver device performance enhancements in the sub-100 nm regime.     

Effects of SiN passivation and high-electric field on AlGaN-GaN HFET degradation

The authors report on the effects of silicon nitride (SiN) surface passivation and high-electric field stress (hot electron stress) on the degradation of undoped AlGaN-GaN power HFETs. Stressed devices demonstrated a decrease in the drain current and maximum transconductance and an increase in the parasitic drain series resistance, gate leakage, and subthreshold current. The unpassivated devices showed more significant degradation than SiN passivated devices. Gate lag phenomenon was observed from unpassivated devices and removed by SiN passivation. However, SiN passivated devices also showed gate lag phenomena after high-electric field stress, which suggests possible changes in surface trap profiles occurred during high-electric field stress test.     

High-performance MIM capacitor using ALD high-k HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectrics

For the first time, we successfully fabricated and demonstrated high performance metal-insulator-metal (MIM) capacitors with HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectric using atomic layer deposition (ALD) technique. Our data indicates that the laminate MIM capacitor can provide high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz up to 20 GHz, very low leakage current of 3.2 /spl times/ 10/sup -8/ A/cm/sup 2/ at 3.3 V, small linear voltage coefficient of capacitance of 240 ppm/V together with quadratic one of 1830 ppm/V/sup 2/, temperature coefficient of capacitance of 182 ppm//spl deg/C, and high breakdown field of /spl sim/6 MV/cm as well as promising reliability. As a result, the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising candidate for next generation MIM capacitor for radio frequency and mixed signal integrated circuit applications.     

Inside Front Cover: The Elastic Properties and Plastic Behavior of Two‐Dimensional Polymer Structures Fabricated by Laser Interference Lithography (Adv. Funct. Mater. 10/2006)

The probing of the micromechanical properties within a two‐dimensional polymer structure with sixfold symmetry fabricated via interference lithography reveals a nonuniform spatial distribution in the elastic modulus “imprinted” with an interference pattern in work reported by Tsukruk, Thomas, and co‐workers on p. 1324. The image prepared by M. Lemieux and T. Gorishnyy shows how the interference pattern is formed by three laser beams and is transferred to the solid polymer structure. The elastic and plastic properties within a two‐dimensional polymer (SU8) structure with sixfold symmetry fabricated via interference lithography are presented. There is a nonuniform spatial distribution in the elastic modulus, with a higher elastic modulus obtained for nodes (brightest regions in the laser interference pattern) and a lower elastic modulus for beams (darkest regions in the laser interference pattern) of the photopatterned films. We suggest that such a nonuniformity and unusual plastic behavior are related to the variable material properties “imprinted” by the interference pattern.     

Optimization of Selective Epitaxial Growth of Silicon in LPCVD

Selective epitaxial growth (SEG) of silicon has attracted considerable attention for its good electrical properties and advantages in building microstructures in high‐density devices. However, SEG problems, such as an unclear process window, selectivity loss, and nonuniformity have often made application difficult. In our study, we derived processing diagrams for SEG from thermodynamics on gas‐phase reactions so that we could predict the SEG process zone for low pressure chemical vapor deposition. In addition, with the help of both the concept of the effective supersaturation ratio and three kinds of E‐beam patterns, we evaluated and controlled selectivity loss and nonuniformity in SEG, which is affected by the loading effect. To optimize the SEG process, we propose two practical methods: One deals with cleaning the wafer, and the other involves inserting dummy active patterns into the wide insulator to prevent the silicon from nucleating.     

Transmission performance of 10-Gb/s 1550-nm transmitters using semiconductor optical amplifiers as booster amplifiers

We have demonstrated the transmission performance of 10-Gb/s transmitters based on LiNbO/sub 3/ modulator using semiconductor optical amplifiers (SOAs) as booster amplifiers. Utilizing the negative chirp converted in SOAs and self-phase modulation induced by high optical power, we can successfully transmit 10-Gb/s optical signals over 80 km through the standard single-mode fiber with the transmitter using SOAs as booster amplifiers. SOAs can be used for booster amplifiers with a careful adjustment of the operating conditions. In order to further understand an SOA's characteristics as a booster amplifier, we model SOAs and other subsystems to verify the experimental results. Based on the good agreement between the experimental and simulation results, we can find the appropriate parameters of input signals for SOAs, such as extinction ratio, rising/falling time, and chirp parameter to maximize output dynamic range and available maximum output power (P/sub o,max/).     

Lost retransmission detection for TCP SACK

There have been a lot of works to avoid retransmission timeout (RTO) of transmission control protocol (TCP) that takes place in an unnecessary situation. However, most current TCP implementations, even if selective acknowledgment (SACK) option is used, do not have a mechanism to detect a lost retransmission and avoid subsequent RTO. In this letter, we propose a simple modification that enables a TCP sender using SACK option to detect a lost retransmission, which is called TCP SACK+ in simple. We use a stochastic model to evaluate the performance of TCP SACK+. Numerical results evaluated by simulations show that TCP SACK+ improves the loss recovery of TCP SACK significantly in presence of random losses.     

Geometric derivation of expectation-maximization and generalized successive interference cancellation algorithms with applications to CDMA channel estimation

The expectation-maximization (EM) algorithm is well established as a computationally efficient method for separable signal parameter estimation. Here, a new geometric derivation and interpretation of the EM algorithm is given that facilitates the understanding of EM convergence properties. Geometric considerations lead to an alternative separable signal parameter estimator based on successive cancellation. The new generalized successive interference cancellation (GSIC) algorithm is then applied to multiuser delay and channel estimation for code-division multiple access (CDMA) radiolocation and communication. The radiolocation application uses a handshaking protocol in which multiple reference nodes transmit acknowledge (ACK) CDMA packets to a master node, which then computes round-trip travel times (RTTs). Simulation results comparing EM and GSIC are presented for the CDMA channel-estimation problem.     

A study of the numerical dispersion relation for the 2-D ADI-FDTD method

This letter presents a numerical dispersion relation for the two-dimensional (2-D) finite-difference time-domain method based on the alternating-direction implicit time-marching scheme (2-D ADI-FDTD). The proposed analytical relation for 2-D ADI-FDTD is compared with those relations in the previous works. Through numerical tests, the dispersion equation of this work was shown as correct one for 2-D ADI-FDTD.     

Enhanced Photoelectrochemistry in CdS/Au Nanoparticle Bilayers

Three different configurations of Au‐nanoparticle/CdS‐nanoparticle arrays are organized on Au/quartz electrodes for enhanced photocurrent generation. In one configuration, Au‐nanoparticles are covalently linked to the electrode and the CdS‐nanoparticles are covalently linked to the bare Au‐nanoparticle assembly. The resulting photocurrent, φ = 7.5 %, is ca. 9‐fold higher than the photocurrent originating from a CdS‐nanoparticle layer that lacks the Au‐nanoparticles, φ = 0.8 %. The enhanced photocurrent in the Au/CdS nanoparticle array is attributed to effective charge separation of the electron–hole pair by the injection of conduction‐band electrons from the CdS‐ to the Au‐nanoparticles. Two other configurations involving electrostatically stabilized bipyridinium‐crosslinked Au/CdS or CdS/Au nanoparticle arrays were assembled on the Au/quartz crystal. The photocurrent quantum yields in the two systems are φ = 10 % and φ = 5 %, respectively. The photocurrents in control systems that include electrostatically bridged Au/CdS or CdS/Au nanoparticles by oligocationic units that lack electron‐acceptor units are substantially lower than the values observed in the analogous bipyridinium‐bridged systems. The enhanced photocurrents in the bipyridinium‐crosslinked systems is attributed to the stepwise electron transfer of conduction‐band electrons to the Au‐nanoparticles by the bipyridinium relay bridge, a process that stabilizes the electron–hole pair against recombination and leads to effective charge separation.