Optically preamplified receiver performance due to VSB filtering for 40-Gb/s optical signals modulated with various formats

Optically preamplified receiver performance according to the vestigial sideband (VSB) filtering has been numerically investigated for 40-Gb/s optical signals modulated with nonreturn-to-zero, duobinary nonreturn-to-zero (NRZ), return-to-zero (RZ), carrier-suppressed RZ, and duobinary carrier-suppressed RZ formats. The VSB filtering enables the spectral widths of NRZ, duobinary NRZ, and RZ signals to be reduced without severe power penalties at the receiver. On the other hand, carrier-suppressed RZ and duobinary carrier-suppressed RZ signals have no large advantages over VSB filtering because of the characteristics of their signals. Our results suggest that RZ signals are the most suitable modulation format for VSB filtering, without considering the filter loss, because of the tolerance of the intersymbol interference and a large spectral width. However, duobinary NRZ signals are the most suitable modulation format for VSB filtering, considering the filter loss, because of their narrow spectral width.     

High-performance MIM capacitor using ALD high-k HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectrics

For the first time, we successfully fabricated and demonstrated high performance metal-insulator-metal (MIM) capacitors with HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectric using atomic layer deposition (ALD) technique. Our data indicates that the laminate MIM capacitor can provide high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz up to 20 GHz, very low leakage current of 3.2 /spl times/ 10/sup -8/ A/cm/sup 2/ at 3.3 V, small linear voltage coefficient of capacitance of 240 ppm/V together with quadratic one of 1830 ppm/V/sup 2/, temperature coefficient of capacitance of 182 ppm//spl deg/C, and high breakdown field of /spl sim/6 MV/cm as well as promising reliability. As a result, the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising candidate for next generation MIM capacitor for radio frequency and mixed signal integrated circuit applications.     

Geometric derivation of expectation-maximization and generalized successive interference cancellation algorithms with applications to CDMA channel estimation

The expectation-maximization (EM) algorithm is well established as a computationally efficient method for separable signal parameter estimation. Here, a new geometric derivation and interpretation of the EM algorithm is given that facilitates the understanding of EM convergence properties. Geometric considerations lead to an alternative separable signal parameter estimator based on successive cancellation. The new generalized successive interference cancellation (GSIC) algorithm is then applied to multiuser delay and channel estimation for code-division multiple access (CDMA) radiolocation and communication. The radiolocation application uses a handshaking protocol in which multiple reference nodes transmit acknowledge (ACK) CDMA packets to a master node, which then computes round-trip travel times (RTTs). Simulation results comparing EM and GSIC are presented for the CDMA channel-estimation problem.     

Advanced disturbance observer design for mechanical positioning systems

Disturbance-observer (DOB)-based controller design is one of the most popular methods in the field of motion control. In this paper, the generalized disturbance compensation framework, named the robust internal-loop compensator (RIC) is introduced and an advanced design method of a DOB is proposed based on the RIC. The mixed sensitivity optimization problem, which is the main issue of DOB design, is also solved through the parametrization of the DOB in the RIC framework. Differently from conventional methods, the Q-filter is separated from the mixed sensitivity optimization problem and a systematic design law for the DOB is proposed. This guarantees the robustness and optimality of the DOB and enables the design for unstable plants.     

Wideband microstrip array antenna with sidelobe cancellationchannels

An antenna array for wideband operation (up to 70%) is presented. The structure has low windloading area and consists of parallel printed circuit boards (PCB) with microstrip dipoles, feed network and metal fences placed between the PCBs. The low profile, low weight antenna array forms the main beam and three difference patterns for sidelobe cancellation. Experimental results are compared with calculations for both microstrip dipole and array     

High-performance automatic target recognition through data-specificVLSI

Under the Mojave configurable computing project, we have developed a system for achieving high performance on an automatic target recognition (ATR) application through the use of configurable computing technology. The ATR system studied here involves real-time image acquisition from a synthetic aperture radar (SAR). SAR images exhibit statistical properties which can be used to improve system performance. In this paper, the Mojave configurable computing system uses field programmable gate arrays (FPGA's) to implement highly specialized circuits while retaining the flexibility of programmable components. A controller sequences through a set of specialized circuits in response to real-time events. Computer-aided design (CAD) tools have been developed to support the automatic generation of these specialized circuits. The resulting configurable computing system achieves a significant performance advantage over the existing solution, which is based on application specific integrated circuit (ASIC) technology     

使用无线网络分析器调试ZigBee协议系统

本文详细探讨了使用无线网络分析器调试ZigBee协议系统的基本方法,从而便于更好地确保网络的可靠性.     

A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC

A 0.9 V third-order double-sampled delta-sigma audio ADC is presented. A new method using a combination of a switched-RC technique and a floating switched-capacitor double-sampling configuration enabled low-voltage operation without clock boosting or bootstrapping. A three-level quantizer with simple dynamic element matching was used to improve linearity. The prototype IC implemented in a 0.13 CMOS process achieves 92 dB DR, 91 dB SNR and 89 dB SNDR in a 24 kHz audio signal bandwidth, while consuming 1.5 mW from a 0.9 V supply. The prototype operates from 0.65 V to 1.5 V supply with minimal performance degradation.     

Direct adaptive control of nonminimum phase systems using integralaction

A direct adaptive control scheme is proposed for nonminimum-phase systems in which controller parameters are estimated from the recursive least-squares algorithm and additional auxiliary parameters are obtained from the proposed polynomial identity. A local convergence is guaranteed without any extra condition. Integral action is incorporated into the adaptive controller to eliminate the steady-state error and to satisfy a condition of the unique solution for the polynomial identity. The control law used in this scheme is based on the set-point-on-I-only proportional-integral-derivative (PID) structure     

A 0.6–2.7 GHz Semidynamic Frequency Divide-by-3 Utilizing Wideband RC Polyphase Filter in 0.18 $mu$m CMOS

A wideband complementary metal oxide semiconductor (CMOS) semidynamic frequency divide-by-3 covering more than two octave bandwidths is presented. The wideband operation without requiring a quadrature signal source is realized by employing a three-stage RC polyphase filter. The transfer function analysis on Type-II two- and three-stage polyphase filters is performed to provide analytic solutions of the peak phase error and peak attenuation. Implemented in 0.18 mum CMOS, the divide-by-3 operates over the input frequency range between 0.6 and 2.7 GHz while dissipating 15 mA from a 1.8 V supply.