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21.
Jiatian Chen Le Yang Ying Li Qinghua Hou Lanlan Li Peng Jin 《International journal of quantum chemistry》2019,119(16):e25961
Inorganic planar ring-shape molecules with 4n + 2 π electrons are always the focus of experimental synthesis and theoretical research due to their potential aromaticity and stability. In this work, the whole series of five-membered heterocycle monoanions X nY5-n− (X, Y = group 15 elements; n = 1-4) were thoroughly investigated by means of density functional theory calculations. They all have large formation energies and HOMO-LUMO gap energies, suggesting the potential thermodynamic and kinetic stability. Their aromaticities are comparable to that of typical aromatic hydrocarbons. Their thermal stabilities were firmly established by the ab initio molecular dynamics simulations. As most of them are predicted for the first time, their various spectra were simulated for experimental characterization. Furthermore, we demonstrate that these five-membered cyclic anions can be employed as η5-ligand to construct novel all-inorganic metallocenes, which may serve as the building blocks of low-dimensional nanomaterials. 相似文献
22.
本文采用脉冲激光沉积方法在LaAlO3(001)单晶衬底上制备了反钙钛矿GaCMn3薄膜,通过控制制备过程中脉冲激光的能量,研究了不同激光能量条件对GaCMn3薄膜结构与物理性能的影响.分别利用X射线衍射仪、原子力显微镜、超导量子干涉仪和物理性能测试系统,对所制备的薄膜的晶体结构、表面形貌和磁性、电输运性质进行了研究.结果表明,制备的样品均为具有多个晶面取向的反钙钛矿薄膜,且薄膜结构和物性明显随制备激光能量的变化而变化.当激光能量为450mJ时,制备的薄膜多晶面取向性最弱,结晶性和表面形貌最优良.实验所得的薄膜均表现出顺磁-铁磁-反铁磁相转变,然而转变过程比块材较平缓,同时薄膜的电阻率并未表现出块材中的突变特征,我们推测该现象很可能是由衬底的应力及衬底的晶格膨胀对薄膜反常晶格变化的抑制作用造成的. 相似文献
23.
Understanding and control of the surface properties such as molecular orientations are of great importance in numerous applications of ionic liquids. However, there remain discrepancies among the previous experimental and theoretical studies on the surface orientation and structures of room temperature ionic liquids(RTIL) systems. In this article, the orientation of 1-butyl-3-methylimidazolium([bmin]) cation at the air/liquid interface of a characteristic RTIL, 1-butyl-3-methylimidazolium hexafluorophosphate([bmim][PF6]), was investigated by the sum frequency generation vibrational spectroscopy(SFG-VS). Detailed polarization and experimental configuration analyses of the SFG-VS spectra showed the possibility of a small spectral splitting in the CH3 symmetric stretching region, which can be further attributed to the probable existence of multiple orientations for the interfacial [bmim] cations. In addition, the(N)–CH3 vibrations were absent, ruling out the prediction by several recent molecular dynamics simulations which state that portions of the [bmim] cations orient with a standing-up(N)–CH3 group at the ionic liquid surface. Hence, new realistic theoretical models have to be developed to reflect the complex nature of the ionic liquid surface. 相似文献
24.
Here, we report a new strategy for rapid synthesis of branched peptide by side-chain hydrazide ligation at Asn. The hydrazide was converted to thioester at Asn side chain by NaNO2 and thiol reagent, and sequential ligation with an N-terminus Cys-peptide efficiently afforded the branched peptide. A branched cyclic peptide was successfully synthesized by side-chain ligation with a two-Cys-peptide and formation of a disulfide bond. This approach provides a new way for expeditious synthesis of branched peptides and facilitates the design of neopeptides as functional bio-mimics. 相似文献
25.
Pan Huang Dawen Xu Robert M. Reich Felix Kaiser Boping Liu Fritz E. Kühn 《Tetrahedron letters》2019,60(24):1574-1577
A first example of an Et2Zn mediated silylation of 1-aklynes is reported. A series of functional groups are tolerated in this reaction. Mechanistic studies support Zn alkynilides as intermediates in the reaction. This reaction protocol provides a practical method for the preparation of alkynylsilanes and expands the application of organometallic zinc in organic synthesis. 相似文献
26.
High-performance and power-efficient CMOS comparators 总被引:1,自引:0,他引:1
Chung-Hsun Huang Jinn-Shyan Wang 《Solid-State Circuits, IEEE Journal of》2003,38(2):254-262
Several design techniques for high-performance and power-efficient CMOS comparators are proposed. First, the comparator is based on the priority-encoding (PE) algorithm, and the dynamic circuit technique developed specifically for the priority encoder can be applied. Second, the PE function and the subsequent logic functions are merged and efficiently realized in the multiple output domino logic (MODL) to result in a shortened logic depth. The circuit in MODL CMOS is also compact and power efficient because few transistors are needed. Third, the multilevel look-ahead technique is used to shorten the path of priority-token propagation. Finally, the circuit is realized with a latch-based two-stage pipelined structure, and the comparison function is partitioned into two parts, with each part executed in each half of the clock cycle in a delay-balanced manner. Post-layout simulation results show that a 64-b comparator designed with the proposed techniques in a 3-V 0.6-/spl mu/m CMOS technology is 16% faster, 50% smaller, and 79% more power efficient as compared with the all-n-transistor comparator, which is the fastest among the conventional comparators. Measurement results of the test chip conform with simulation results and prove the feasibility of the proposed techniques. 相似文献
27.
Rogin J. Kouchev I. Brenna G. Tschopp D. Qiuting Huang 《Solid-State Circuits, IEEE Journal of》2003,38(12):2239-2248
A 2-GHz direct-conversion receiver for wide-band code division multiple access (WCDMA) is presented. It includes two low-noise amplifiers (LNAs), an I/Q demodulator, and two sixth-order baseband channel select filters with programmable gain. Quadrature local oscillator (LO) signals are generated on chip in a frequency divider flip-flop. An external interstage filter between the LNAs rejects transmitter leakage to relax demodulator linearity requirements. A low-voltage demodulator topology improves linearity as well as demodulator output pole accuracy. The active-RC baseband filter uses a programmable servo loop for offset compensation and provides an adjacent channel rejection of 39 dB. Programmable gain over 71-dB range in 1-dB steps is merged with the filter to maximize dynamic range. An automatic on-chip frequency calibration scheme provides better than 1.5% corner frequency accuracy. The receiver is integrated in a 0.13-/spl mu/m CMOS process with metal-insulator-metal (MIM) capacitors. Measured receiver performance includes a 6.5-dB noise figure, IIP2 of +27 dBm, and IIP3 of -8.6 dBm. Power consumption is 45 mW. 相似文献
28.
Analysis and architecture design of variable block-size motion estimation for H.264/AVC 总被引:1,自引:0,他引:1
Ching-Yeh Chen Shao-Yi Chien Yu-Wen Huang Tung-Chien Chen Tu-Chih Wang Liang-Gee Chen 《IEEE transactions on circuits and systems. I, Regular papers》2006,53(3):578-593
Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory. 相似文献
29.
实验室的质量监督(上) 总被引:4,自引:0,他引:4
质量监督是实验室保持人员能力,进行自我完善,日常渐进的重要手段,是持续改进的重要组成部分,也是实验室管理工作的难点,本文给出质量监督的目的、对象、方法、记录等. 相似文献
30.