Direct Intermediate Regulation Enabled by Sulfur Containers in Working Lithium–Sulfur Batteries

Polysulfide intermediates (PSs), the liquid-phase species of active materials in lithium–sulfur (Li-S) batteries, connect the electrochemical reactions between insulative solid sulfur and lithium sulfide and are key to full exertion of the high-energy-density Li-S system. Herein, the concept of sulfur container additives is proposed for the direct modification on the PSs species. By reversible storage and release of the sulfur species, the container molecule converts small PSs into large organosulfur species. The prototype di(tri)sulfide-polyethylene glycol sulfur container is highly efficient in the reversible PS transformation to multiply affect electrochemical behaviors of sulfur cathodes in terms of liquid-species clustering, reaction kinetics, and solid deposition. The stability and capacity of Li-S cells was thereby enhanced. The sulfur container is a strategy to directly modify PSs, enlightening the precise regulation on Li-S batteries and multi-phase electrochemical systems.     

简化形式的系统EMC预测分析技术概述

本文探讨了系统级简化形式的电磁兼容性预测分析方法，该方法对于只有几对发-收干扰对的系统EMI的预测分析简洁有效，它避免了大系统间繁复的建模与大量的数据采集及其计算工作，从而对于只考虑其结果的系统间的EMC预测分析提高了效率。     

High-performance and power-efficient CMOS comparators

Several design techniques for high-performance and power-efficient CMOS comparators are proposed. First, the comparator is based on the priority-encoding (PE) algorithm, and the dynamic circuit technique developed specifically for the priority encoder can be applied. Second, the PE function and the subsequent logic functions are merged and efficiently realized in the multiple output domino logic (MODL) to result in a shortened logic depth. The circuit in MODL CMOS is also compact and power efficient because few transistors are needed. Third, the multilevel look-ahead technique is used to shorten the path of priority-token propagation. Finally, the circuit is realized with a latch-based two-stage pipelined structure, and the comparison function is partitioned into two parts, with each part executed in each half of the clock cycle in a delay-balanced manner. Post-layout simulation results show that a 64-b comparator designed with the proposed techniques in a 3-V 0.6-/spl mu/m CMOS technology is 16% faster, 50% smaller, and 79% more power efficient as compared with the all-n-transistor comparator, which is the fastest among the conventional comparators. Measurement results of the test chip conform with simulation results and prove the feasibility of the proposed techniques.     

A 1.5-V 45-mW direct-conversion WCDMA receiver IC in 0.13-/spl mu/m CMOS

A 2-GHz direct-conversion receiver for wide-band code division multiple access (WCDMA) is presented. It includes two low-noise amplifiers (LNAs), an I/Q demodulator, and two sixth-order baseband channel select filters with programmable gain. Quadrature local oscillator (LO) signals are generated on chip in a frequency divider flip-flop. An external interstage filter between the LNAs rejects transmitter leakage to relax demodulator linearity requirements. A low-voltage demodulator topology improves linearity as well as demodulator output pole accuracy. The active-RC baseband filter uses a programmable servo loop for offset compensation and provides an adjacent channel rejection of 39 dB. Programmable gain over 71-dB range in 1-dB steps is merged with the filter to maximize dynamic range. An automatic on-chip frequency calibration scheme provides better than 1.5% corner frequency accuracy. The receiver is integrated in a 0.13-/spl mu/m CMOS process with metal-insulator-metal (MIM) capacitors. Measured receiver performance includes a 6.5-dB noise figure, IIP2 of +27 dBm, and IIP3 of -8.6 dBm. Power consumption is 45 mW.     

Analysis and architecture design of variable block-size motion estimation for H.264/AVC

Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory.     

实验室的质量监督(上)

质量监督是实验室保持人员能力,进行自我完善,日常渐进的重要手段,是持续改进的重要组成部分,也是实验室管理工作的难点,本文给出质量监督的目的、对象、方法、记录等.     

"十一五"规划国家级重点通信项目

《信息产业科技发展“十一五”规划》提出设立部分重大项目,力争实现重点突破,形成一批具有自主知识产权的核心技术和创新产品,打造较为完整的产业链,形成世界一流的产业群。这其中,与通信相关的重点项目主要有:宽带无线移动通信、下一代网络、家庭网络、智能终端、数字电视等。本部分将对我国在以上领域的现状、项目的具体内容和目标、实现这些目标的具体计划以及相关厂商在各领域的努力和成绩进行介绍。     

全球3G市场管制政策分析

主要对各国3G许可证与使用技术标准的抽绑政策．各国对2G／3G网络漫游的管制规定。以及3G网络之间共享的种类及实施方式等方面做了详尽的讲解，并进行比较和分析。     

Electrical characterization and process control of cost-effective high-k aluminum oxide gate dielectrics prepared by anodization followed by furnace annealing

A cost-effective technique was introduced to prepare ultrathin aluminum oxide (Al/sub 2/O/sub 3/) gate dielectrics with equivalent oxide thickness (EOT) down to 14 /spl Aring/. Al/sub 2/O/sub 3/ was fabricated by anodic oxidation (anodization) of ultrathin Al films at room temperature in deionized water and then furnace annealed at 650/spl deg/C in N/sub 2/ ambient. Both dc and dac (dc superimposed with ac) anodization techniques were investigated. Effective dielectric constant of k/spl sim/7.5 and leakage current of 2-3 orders of magnitude lower than SiO/sub 2/ are observed. The conduction mechanism in Al/sub 2/O/sub 3/ gate stack is shown to be Fowler-Nordheim (F-N) tunneling. Saturated current behavior in the inversion region of MOS capacitor is observed. It is found that the saturation current is sensitive to interface state capacitance and can be used as an efficient way to evaluate the Al/sub 2/O/sub 3/ gate stack/Si-substrate interfacial property. An optimal process control for preparing Al/sub 2/O/sub 3/ gate dielectrics with minimized interface state capacitance via monitoring the inversion saturation current is demonstrated.     

信息社会的理念与发展

首先介绍了信息社会的基本特征，并围绕信息的接入、信息的发布、知识产权、隐私权、信息安全和文化多元性等阐述了信息伦理的内容和概念。最后介绍了信息对人类生活的影响，主要包括交往方式、信息处理方式、学习方式、商业运作方式、医疗方式、产品设计方式、科研方式和政府工作方式等。