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951.
A method for solving the Diophantine equation using a nonsingular matrix equation system is proposed in this note. A scheme of setting up a system with the same number of variables as equations is described. An analytical approach to ensure the invertibility of the system formed is given. Examples presented show the simplicity of the method.  相似文献   
952.
RED gateway congestion control using median queue size estimates   总被引:1,自引:0,他引:1  
This paper focuses on the queue size estimation problem in random early detection (RED) gateways. Queue size estimation plays a fundamental role in the congestion control dynamics of RED, as it determines gateways' awareness of network congestion, which in turn determines the packet dropping/marking decision. Conventional RED gateways use exponentially weighted moving averages (EWMA) to estimate the queue size. These infinite impulse response (IIR) filters require very small EWMA weights in order to effectively avoid nonlinear instabilities in RED and to filter out bursty increases in the queue size. While small EWMA weights enable gateways to accommodate transient congestion, they also lead to gateways' failure to closely track rapid queue size depletion and thus causes link under utilization. We investigate the use of simple nonlinear queue size estimators. In particular, we study the congestion control dynamics of a network where adaptive weighted median filters are used for queue size estimation by the gateways. Analytical results for the expected queue size in the steady state are derived. Under this new queue size estimation framework, design guidelines for the remaining RED parameters are provided. Simulation results show that the proposed algorithm provides greater network power, better prevention of global synchronization, and a fairer treatment to bursty traffic than the RED algorithm does.  相似文献   
953.
We consider performance of a wireless communication receiver in the presence of a field of continuous wave (CW) interferers that are randomly distributed according to a Poisson process in space and frequency domain in the unlicensed band. From our theoretical model, we derive an accurate analytical expression for average bit error rate (BER). Judging from our results for a strong desired signal, when the user density grows up to ten times its value for a given signal to noise ratio (SNR), BER performance falls by 9.09% and 8.51 % for BPSK and DPSK respectively.  相似文献   
954.
A biomorphic digital image sensor   总被引:2,自引:0,他引:2  
An arbitrated address-event imager has been designed and fabricated in a 0.6-/spl mu/m CMOS process. The imager is composed of 80 /spl times/ 60 pixels of 32 /spl times/ 30 /spl mu/m. The value of the light intensity collected by each photosensitive element is inversely proportional to the pixel's interspike time interval. The readout of each spike is initiated by the individual pixel; therefore, the available output bandwidth is allocated according to pixel output demand. This encoding of light intensities favors brighter pixels, equalizes the number of integrated photons across light intensity, and minimizes power consumption. Tests conducted on the imager showed a large output dynamic range of 180 dB (under bright local illumination) for an individual pixel. The array, on the other hand, produced a dynamic range of 120 dB (under uniform bright illumination and when no lower bound was placed on the update rate per pixel). The dynamic range is 48.9 dB value at 30-pixel updates/s. Power consumption is 3.4 mW in uniform indoor light and a mean event rate of 200 kHz, which updates each pixel 41.6 times per second. The imager is capable of updating each pixel 8.3K times per second (under bright local illumination).  相似文献   
955.
Bias-temperature instabilities (BTI) of HfO/sub 2/ metal oxide semiconductor field effect transistors (MOSFETs) have been systematically studied for the first time. NMOS positive BTI (PBTI) exhibited a more significant V/sub t/ instability than that of PMOS negative BTI (NBTI), and limited the lifetime of HfO/sub 2/ MOSFETs. Although high-temperature forming gas annealing (HT-FGA) improved the interface quality by passivating the interfacial states with hydrogen, BTI behaviors were not strongly affected by the technique. Charge pumping measurements were extensively used to investigate the nature of the BTI degradation, and it was found that V/sub t/ degradation of NMOS PBTI was primarily caused by charge trapping in bulk HfO/sub 2/ rather than interfacial degradation. Deuterium (D/sub 2/) annealing was found to be an excellent technique to improve BTI immunity as well as to enhance the mobility of HfO/sub 2/ MOSFETs.  相似文献   
956.
We propose a discrete nonlinear controller, developed in a synchronous frame, for a parallel three-phase boost converter consisting of two modules. The basic idea, however, can be extended to a system with N modules. Each of the closed-loop power-converter modules operates asynchronously without any communication with the other modules. The controller stabilizes the currents on the dq-axes and limits the flow of the pure-zero sequence current. It combines the space-vector modulation scheme with a variable-structure control, thereby keeping the switching frequency constant and achieving satisfactory dynamic performance.  相似文献   
957.
We study the influence of the technologically caused eccentricity of a circular-pad via-hole. We derive an eigenvalue equation using a rigorous method based on a linear transformation of the via-hole polar coordinates. The eigenvalue equation is used to compute the modal resonant frequencies and the modal fields of the eccentric via. It is shown that the via-hole misalignment shifts the modal frequencies and influences its frequency band. The proposed model is verified with published experimental data, and is also compared with results generated with the full-wave simulator Agilent Momentum-2002.  相似文献   
958.
Kishine  K. Onodera  H. 《Electronics letters》2005,41(23):1273-1275
A method to estimate the acquisition time for the clock and data recovery (CDR) IC using the linear phase-locked loop (PLL) technique is proposed. Estimations using the method follow the measured acquisition time for the PLL with any loop parameters, which makes it possible to design the CDR IC for various targets.  相似文献   
959.
Properties determining choice of mother wavelet   总被引:3,自引:0,他引:3  
Properties of wavelets with finite as well as infinite support are summarised to facilitate mother wavelet selection in a chosen application. The quantitative guidelines reduce dependence on trial-and-error schemes resorted to for selection and underscore the importance of such selection in any application of interest. In wavelet-based image sequence superresolution, studied during the last four years, the use of a B-spline mother wavelet is justified.  相似文献   
960.
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