Over GHz electrical circuit model of a high-density multiple line grid array (MLGA) interposer

The multiple line grid array (MLGA) interposer was recently introduced as a future high-density high-speed bonding method. In this paper, we introduce an electrical model and high-frequency characteristics of the MLGA interposer. The high-frequency electrical model was extracted from microwave S-parameter measurements up to 20 GHz as well as from fundamental microwave network analysis. For the parameter fitting process during model extraction, an optimization method was used. Several different types of MLGA interposers were designed, assembled and tested. The test vehicles contained coplanar waveguides, probing pads and an MLGA interposer structure. The height of the MLGA, the conductor shape inside the MLGA, and the dielectric insulator of the MLGA were varied. From the model, an MLGA with a height of 0.4 mm and a polymer dielectric insulator was found to have 203 pH of self inductance, 49 pH of mutual inductance with the nearest ground conductor line, and 186 fF of mutual capacitance. By reducing the height of the MLGA and by using an insulator with a lower dielectric constant, parasitic inductance and capacitance is further reduced. TDR/TDT simulation and measurement showed the validity of the extracted model parameters of the MLGA interposer. Circuit simulation based on the extracted model revealed that the MLGA interposer could be successfully used for microwave device packages up to 20 GHz and for high-speed digital device packages with a clock cycle up to 5 GHz.     

Threshold selection algorithm for extracting a uniform colour region in an image

A new threshold selection algorithm for multidimensional feature space is proposed, and its applications to colour images are shown. This algorithm is based on tho recursive application of a simple 1-D threshold selection method (valley detection) to the conditional 1-D histograms. Although the performance of the algorithm such as convergence rate etc. is not yet evaluated, uniform colour regions are successfully extracted by the proposed algorithm for several colour images.     

Monolithic SiGe Up‐/Down‐Conversion Mixers with Active Baluns

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on‐chip 1 to 6 GHz up‐conversion and 1 to 8 GHz down‐conversion mixers using a 0.8 µm SiGe hetero‐junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up‐conversion mixer was implemented on‐chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up‐conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down‐conversion mixer was implemented on‐chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down‐conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.     

K- and Q-bands CMOS frequency sources with X-band quadrature VCO

Fully integrated 10-, 20-, and 40-GHz frequency sources are presented, which are implemented with a 0.18-/spl mu/m CMOS process. A 10-GHz quadrature voltage-controlled oscillator (QVCO) is designed to have output with a low dc level, which can be effectively followed by a frequency multiplier. The proposed multipliers generate signals of 20 and 40 GHz using the harmonics of the QVCO. To have more harmonic power, a frequency doubler with pinchoff clipping is used without any buffers or dc-level shifters. The QVCO has a low phase noise of -118.67 dBc/Hz at a 1-MHz offset frequency with a 1.8-V power supply. The transistor size effect on phase noise is investigated. The frequency doubler has a low phase noise of -111.67 dBc/Hz at a 1-MHz offset frequency is measured, which is 7 dB higher than a phase noise of the QVCO. The doubler can be tuned between 19.8-22 GHz and the output is -6.83 dBm. A fourth-order frequency multiplier, which is used to obtain 40-GHz outputs, shows a phase noise of -102.0 dBc/Hz at 1-MHz offset frequency with the output power of -18.0 dBm. A large tuning range of 39.3-43.67 GHz (10%) is observed.     

Computational Implementation of Asymmetric Integral Imaging by Use of Two Crossed Lenticular Sheets

We propose an asymmetric integral imaging method to adjust the resolution and depth of a three‐dimensional image. Our method is obtained by use of two lenticular sheets with different pitches fabricated under the same F/#. The asymmetric integral imaging is the generalized version of integral imaging, including both conventional integral imaging and one‐dimensional integral imaging. We present experimental results to test and verify the performance of our method computationally.     

Hierarchical classifier design in high-dimensional numerous classcases

In applying pattern recognition methods in remote sensing problems, an inherent limitation is that there is almost always only a small number of training samples with which to design the classifier. A hybrid decision tree classifier design procedure that produces efficient and accurate classifiers for this situation is proposed. In doing so, several key questions are addressed, among them the question of the feature extraction techniques to be used and the mathematical relationship between sample size, dimensionality, and risk value. Empirical tests comparing the hybrid design classifier with a conventional single layered one are presented. They suggest that the hybrid design produces higher accuracy with fewer features. The need for fewer features is an important advantage, because it reflects favorably on both the size of the training set needed and the amount of computation time that will be needed in analysis     

pH-inducible beta-glucosidase and beta-glucuronidase of intestinal bacteria.

beta-Glucosidase and beta-glucuronidase of human and rat fecal bacteria were induced by cultivation in alkaline media although their growths were not affected. When a bacterium isolated from human feces producing each enzyme was cultured in a medium at pH 5 for 12-15 h and then adjusted to pH 8, beta-glucosidase and beta-glucuronidase were induced 9.2-fold and 11.5-fold, respectively.     

An Analog Front‐End Circuit for ISO/IEC 14443‐Compatible RFID Interrogators

An analog front‐end circuit for ISO/IEC 14443‐compatible radio frequency identification (RFID) interrogators was designed and fabricated by using a 0.25 µm double‐poly CMOS process. The fabricated chip was operated using a 3.3 Volt single‐voltage supply. The results of this work could be provided as reusable IPs in the form of hard or firm IPs for designing single‐chip ISO/IEC 14443‐compatible RFID interrogators.     

Improved Poisson intensity estimation: denoising application using Poisson data

Recently, Timmermann and Nowak developed algorithms for estimating the means of independent Poisson random variables. The algorithms are based on a multiscale model where certain random variables are assumed to obey a beta-mixture density function. Timmermann and Nowak simplify the density estimation problem by assuming the beta parameters are known and only one mixture parameter is unknown. They use the observed data and the method of moments to estimate the unknown mixture parameter. Taking a different approach, we generate training data from the observed data and compute maximum likelihood estimates of all of the beta-mixture parameters. To assess the improved performance obtained by the proposed modification, we consider a denoising application using Poisson data.     

Electromagnetic micromirror array with single-crystal silicon mirror plate and aluminum spring

We have designed and fabricated an addressable 4 /spl times/ 4 array of micromirrors capable of providing up to 90/spl deg/ of angular deflection. Each micromirror comprises a single-crystalline silicon mirror plate supported by aluminum springs, which provides an extremely flat reflective surface and a compliant spring material that enables the integration of the device into a limited area without mitigating its performance (i.e., total angular deflection). The device is fabricated using a combination of surface and bulk micromachining processes, such as electroplating, bulk wet etching and XeF/sub 2/ etch processes. Selective actuation is accomplished by the use of an electrostatic clamping force on each mirror plate. A mirror rotation angle of more than 80/spl deg/ can be obtained by applying an external magnetic field, and this angle can be further increased by the use of an electrostatic force. The designed structure can be used in microphotonic applications.