无线电测控系统中三元码跟踪双环的研究

本文提出了数字遥测信号与模拟图象信与混合的无线电测控系统中用于捕获和跟踪带钟复合码的跟踪双环方案，分析了双环系统的捕获性能，理论分析和实验结果表明，双环系统不仅捕获时间短，而且具有强的抗干扰能力。     

A versatile leaky-wave antenna based on stub-loaded rectangularwaveguide .III. Comparisons with measurements

For pt.II ibid., vol.46, no.7, p.1042-46. The article describes the measurements that verify the validity of the theoretical expressions for this new type of antenna. Measurements were made both at millimeter wavelengths (40 to 60 GHz) and in the X-band (8 to 12 GHz) frequency range and of two different quantities: the propagation wavenumbers β and α and radiation patterns. Comparisons were made with numerical values obtained from the theoretical expressions derived in parts I and II and very good agreement was found in all cases     

The effect of surface roughness on the radiative properties ofpatterned silicon wafers

The radiative properties of patterned silicon wafers have a major impact on the two critical issues in rapid thermal processing (RTP), namely wafer temperature uniformity and wafer temperature measurement. The surface topography variation of the die area caused by patterning and the roughness of the wafer backside can have a significant effect on the radiative properties, but these effects are not well characterized. We report measurements of room temperature reflectance of a memory die, logic die, and various multilayered wafer backsides. The surface roughness of the die areas and wafer backsides is characterized using atomic force microscopy (AFM). These data are subsequently used to assess the effectiveness of thin film optics in providing approximations for the radiative properties of patterned wafers for RTP applications     

A Low-Power Wide-Dynamic-Range Analog VLSI Cochlea

Low-power wide-dynamic-range systems are extremely hard to build. The biological cochlea is one of the most awesome examples of such a system: It can sense sounds over 12 orders of magnitude in intensity, with an estimated power dissipation of only a few tens of microwatts. In this paper, we describe an analog electronic cochlea that processes sounds over 6 orders of magnitude in intensity, and that dissipates 0.5 mW. This 117-stage, 100 Hz to 10 KHz cochlea has the widest dynamic range of any artificial cochlea built to date. The wide dynamic range is attained through the use of a wide-linear-range transconductance amplifier, of a low-noise filter topology, of dynamic gain control (AGC) at each cochlear stage, and of an architecture that we refer to as overlapping cochlear cascades. The operation of the cochlea is made robust through the use of automatic offset-compensation circuitry. A BiCMOS circuit approach helps us to attain nearly scale-invariant behavior and good matching at all frequencies. The synthesis and analysis of our artificial cochlea yields insight into why the human cochlea uses an active traveling-wave mechanism to sense sounds, instead of using bandpass filters. The low power, wide dynamic range, and biological realism make our cochlea well suited as a front end for cochlear implants.     

Modeling of current-voltage characteristics for strained andlattice matched HEMT's on InP substrate using a variational chargecontrol model

A model for the calculation of the current-voltage characteristics of strained In_0.52Al_0.48As/In_xGa_1-xAs on InP substrate High Electron Mobility Transistors (HEMT's), based on a variational charge control model, is presented. A polynomial fit of the two-dimensional electron gas (2DEG) density is used for the calculation of the current-voltage characteristics. The effect of strain is introduced into the 2DEG density versus gate voltage relation. Very good agreement between the calculated and measured I-V characteristics was obtained. In addition, our results show that, for an indium mole fraction of the In_xGa_1-xAs channel in the range 0.53-0.60, increasing the indium mole fraction lowers the threshold voltage and hence increases the drain current at the same gate bias     

Novel technique for SiO2 formed by liquid-phasedeposition for low-temperature processed polysilicon TFT

A technique for SiO₂ formation by liquid-phase deposition (LPD) at nearly room temperature for low-temperature processed (LTP) polysilicon thin-film transistor (poly-Si TFT) was developed. LPD SiO₂ film with a lower P-etch rate shows a dense structure. LPD SiO₂ also exhibits good electrical characteristics. LTP poly-Si thin-film transistors (TFTs) with LPD SiO ₂ as the gate insulator have been fabricated and investigated. Their characteristics indicate performance adequate for their use as pixel transistors in liquid crystal displays (LCDs)     

An OFDM scheme with a half complexity

The paper deals with an OFDM (orthogonal frequency division multiplexing) system based on filter-bank architecture. The known implementation uses a DFT (discrete Fourier transform) processor and a polyphase network (PPN). Even if it is based on complex components, in the final step it operates the real part extraction of the incoming signal. This leads to redundant operations in the DFT processor and in the PPN. Specifically, for the transmission of N complex symbol sequences at a given rate ½F, an N-point DFT processor and an N-branch PPN, both working at the rate F, are required. This implementation can be improved with a complexity reduction by a factor of two. In fact, in the paper an architecture is presented based on an N-point DFT processor and N-branch PPN at the rate F, for the transmission of 2N (in place of N) complex symbol sequences at the rate ½F     

Algorithm for cosine transform of Toeplitz matrices

An algorithm for calculating the 2D cosine transform of a Toeplitz matrix is presented. The algorithm is based on the application of 1D cosine transforms. More specifically, four 1D cosine transforms of size N are needed to obtain the transform of a Toeplitz matrix of size N×N. This is an improvement over previously published algorithms. The algorithm is also simple and regular     

STI process steps for sub-quarter micron CMOS

This paper presents Shallow Trench Isolation (STI) process steps for sub-1/4 μ CMOS technologies. Dummy active areas, vertical trench sidewalls, excellent gap filling, counter mask etch step and CMP end point detection, have been used for a 0.18 μm CMOS technology. Electrical results obtained with a 5.5 nm gate oxide thickness show good isolation down to 0.3 μm spacing. Good transistor performances have been demonstrated.     

Diffraction of millimeter waves by projecting a shadow pattern onto a semiconductor

The transmission of millimeter waves through a semiconductor changes according to the amount of light falling on it. In the experiments reported here, a pattern of light and shadow is projected onto a sheet of semiconductor and the regions of greater and lesser transmission serve as a diffracting object for a millimeter-wave beam. The light source is a quartz tungsten halogen lamp. A lock-in amplifier is employed to overcome difficulties due to the differences in transmitted power being small.