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21.
Let X be a metric measure space with an s-regular measure μ. We prove that if A ì X{A\subset X} is r{\varrho} -porous, then dimp(A) £ s-crs{{\rm {dim}_p}(A)\le s-c\varrho^s} where dimp is the packing dimension and c is a positive constant which depends on s and the structure constants of μ. This is an analogue of a well known asymptotically sharp result in Euclidean spaces. We illustrate by an example that the corresponding result is not valid if μ is a doubling measure. However, in the doubling case we find a fixed N ì X{N\subset X} with μ(N) = 0 such that dimp(A) £ dimp(X)-c(log\tfrac1r)-1rt{{\rm {dim}_p}(A)\le{\rm {dim}_p}(X)-c(\log \tfrac1\varrho)^{-1}\varrho^t} for all r{\varrho} -porous sets A ì X\ N{A \subset X{\setminus} N} . Here c and t are constants which depend on the structure constant of μ. Finally, we characterize uniformly porous sets in complete s-regular metric spaces in terms of regular sets by verifying that A is uniformly porous if and only if there is t < s and a t-regular set F such that A ì F{A\subset F} .  相似文献   
22.
In this paper a 0.4 μm complementary SiGe process is used to fabricate up-conversion mixers for base-station applications. A current feedback mixer, and a mixer with a folded input, were designed in order to test benefits obtainable from the use of equally fast PNP- and NPN-transistors. The target was to improve linearity and to increase output compression point ( ) of the mixers. A +5 dBm output compression point @2 GHz was measured while drawing 43 mA from 5 V voltage supply. Harri Pellikka was born in Espoo, Finland, in 1980. He received the M.Sc. degree in electronics and electrical engineering from Helsinki University of Technology in 2005. He has been with Helsinki University of Technology Electronic Circuit Design Laboratory since 2003, where he works as research engineer. His research interests include the design of integrated circuits for telecommunication applications. Esa Tiiliharju was born in Rovaniemi, Finland, in 1966. He received the M.Sc. degree in information technology in 1995, and the Lic.Tech degree in electrical engineering in 1998, both from Helsinki University of Technology, Finland. He has joined the Microelectronics Laboratory in University of Turku in 2006. His research interests include the design of integrated circuits for telecommunication applications. Kari A. I. Halonen was born in Helsinki, Finland, on May 23, 1958. He received the M.Sc. degree in electrical engineering from Helsinki University of Technology, Finland, in 1982, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, in Heverlee, Belgium, in 1987. Since 1988 he has been with the Electronic Circuit Design Laboratory, Helsinki University of Technology. From 1993 he has been an associate professor, and since 1997 a full professor at the Faculty of Electrical Engineering and Telecommunications. He became the Head of Electronic Circuit Design Laboratory year 1998. From 1997 to 1999 he was an associate editor of IEEE Transactions on Circuits and Systems I. He has been a guest editor for IEEE Journal of Solid-State Circuits and the Technical Program Committee Chairman for European Solid-State Circuits Conference year 2000. He has been awarded the Beatrice Winner Award in ISSCC’02 Conference year 2002. He specializes in CMOS and BiCMOS analog integrated circuits, particularly for telecommunication applications. He is author or co-author over a hundred and fifty international and national conference and journal publications on analog integrated circuits. He has several patents on analog integrated circuits.  相似文献   
23.
A study was made on the effects of polymerization conditions on the long‐chain branching, molecular weight, and end‐group types of polyethene produced with the metallocene‐catalyst systems Et[Ind]2ZrCl2/MAO, Et[IndH4]2ZrCl2/MAO, and (n‐BuCp)2ZrCl2/MAO. Long‐chain branching in the polyethenes, as measured by dynamic rheometry, depended heavily on the catalyst and polymerization conditions. In a semibatch flow reactor, the level of branching in the polyethenes produced with Et[Ind]2ZrCl2/MAO increased as the ethene concentration decreased or the polymerization time increased. The introduction of hydrogen or comonomer suppressed branching. Under similar polymerization conditions, the two other catalyst systems, (n‐BuCp)2ZrCl2/MAO and Et[IndH4]2ZrCl2/MAO, produced linear or only slightly branched polyethene. On the basis of an end‐group analysis by FTIR and molecular weight analysis by GPC, we concluded that a chain transfer to ethene was the prevailing termination mechanism with Et[Ind]2ZrCl2/MAO at 80 °C in toluene. For the other catalyst systems, β‐H elimination dominated at low ethene concentrations. © 2000 John Wiley & Sons, Inc. J Polym Sci A: Polym Chem 38: 376–388, 2000  相似文献   
24.
One of the attractive features of low-density parity-check (LDPC) codes is the parallel iterative nature of their iterative belief propagation decoding, making them amenable to efficient hardware implementation. However, for an arbitrary code construction, the random-like connections between the code's Tanner graph variable and check nodes makes fully-parallel implementation a difficult task as this leads to complex interconnect wiring and routing congestion. In this paper, we present a novel LDPC code design approach, based on the progressive edge growth (PEG) Tanner graph construction, to solve the problem of dense connections between processing nodes. The approach is based on controlling the maximum connection length between processing nodes in order to make fully parallel implementation feasible. The proposed algorithm offers a good compromise between error correction performance and decoder complexity. Simulation results and FPGA-based implementation comparisons are presented to demonstrate the advantages of the proposed LDPC code constructions, and it is shown that, with proper window-constrained node placement design, an improvement of up to 40% in interconnect efficiency is achievable without any significant degradation in error correction capability.  相似文献   
25.
The effect of absorber saturation on pulse shaping was studied both numerically and experimentally in a semiconductor disk laser. It was found that steady-state mode locking can be achieved even with very weak saturation of the absorber when the pulse energy is well below the saturation energy of absorption. The study discloses for the first time the direct impact of absorber modulation depth on the pulse width. Numerical analysis confirms that partial bleaching of absorption is adequate for formation of stable mode locking in SDLs. The fast gain dynamics of the semiconductor medium approach the dynamics of a slow gain medium at low pulse energies and high repetition rates with a pulse period much shorter than the gain recovery time. The presented results are of practical importance for multigigahertz repetition rate lasers, indicating that sufficient pulse shaping can occur when the saturable absorber is not fully bleached.  相似文献   
26.
We extend the Besicovitch-Federer projection theorem to transversal families of mappings. As an application we show that on a certain class of Riemann surfaces with constant negative curvature and with boundary, there exist natural 2D measures invariant under the geodesic flow having 2D supports such that their projections to the base manifold are 2D but the supports of the projections are Lebesgue negligible. In particular, the union of complete geodesics has Hausdorff dimension 2 and is Lebesgue negligible.  相似文献   
27.
We consider the dispatching problem in a size- and state-aware multi-queue system with Poisson arrivals and queue-specific job sizes. By size- and state-awareness, we mean that the dispatcher knows the size of an arriving job and the remaining service times of the jobs in each queue. By queue-specific job sizes, we mean that the time to process a job may depend on the chosen server. We focus on minimizing the mean sojourn time (i.e., response time) by an MDP approach. First we derive the so-called size-aware relative values of states with respect to the sojourn time in an M/G/1 queue operating under FIFO, LIFO, SPT or SRPT disciplines. For FIFO and LIFO, the size-aware relative values turn out to be insensitive to the form of the job size distribution. The relative values are then exploited in developing efficient dispatching rules in the spirit of the first policy iteration.  相似文献   
28.
Ethene was copolymerized (1) with 1,5‐hexadiene with rac‐ethylenebis(indenyl)zirconium dichloride/methylaluminoxane (MAO) used as a catalyst and (2) with 1,7‐octadiene with bis(n‐butylcyclopentadienyl)zirconium dichloride/MAO and rac‐ethylenebis(indenyl)hafnium dichloride (Et[Ind]2HfCl2)/MAO used as catalysts at 80 °C in toluene. The copolymer microstructure and the influence of diene incorporation on the rheological properties were examined. Ethene and 1,5‐hexadiene formed a copolymer in which a major fraction of the 1,5‐hexadiene was incorporated into rings and a small fraction formed 1‐butenyl branches. The copolymerization of ethene with 1,7‐octadiene resulted in a higher selectivity toward branch formation. Some of the branches formed long‐chain‐branching (LCB) structures. The ring formation selectivity increased with decreasing ethene concentration in the polymerization reactor. Melt rheological properties of the diene copolymers resembled those of metallocene‐catalyzed LCB homopolyethenes and depended on the vinyl content, the catalyst, and the polymerization conditions. At high diene contents, all three catalysts produced crosslinked polyethene. This was especially pronounced with Et[Ind]2HfCl2, where only 0.2 mol % 1,7‐octadiene in the copolymer was required to achieve significantly modified rheological properties. © 2001 John Wiley & Sons, Inc. J Polym Sci Part A: Polym Chem 39: 3805–3817, 2001  相似文献   
29.
It has recently shown how a constant dc offset between two low-quality test signals can be used to test the integral nonlinearity (INL) of A/D converters (ADCs) without an accurate test stimulus, and how the same method can be used to test the INL of D/A converters (DACs) as well. We propose here an on-chip offset generator for producing the constant offset and analyse its limitations. Experimental tests on the 122 × 22 μm2 offset generator fabricated in 130 nm CMOS process show that it can be used to test the INL of 12-b DACs and ADCs. The generator is rail-to-rail capable so that almost the whole input/output range of converters can be tested. Moreover, if the proposed offset generator is used in a ratiometric test setup as proposed here as well, the influence of a reference voltage drift on measurement accuracy is cancelled out. Because of its small size, simple design, rail-to-rail capability and immunity to reference voltage changes, the proposed offset generator is well suited for built-in self-test usage.  相似文献   
30.
This paper presents a collaborative beamforming (CB) technique to organize the sensor node's location in a linear array for green wireless sensor network (WSN) applications. In this method, only selected clusters and active CB nodes are needed each time to perform CB in WSNs. The proposed least-square linear array (LSLA) manages to select nodes to perform as a linear antenna array (LAA), which is similar to and as outstanding as the conventional uniform linear array (ULA). The LSLA technique is also able to solve positioning error problems that exist in the random nodes deployment. The beampattern fluctuations have been analyzed due to the random positions of sensor nodes. Performances in terms of normalized power gains are given. It is demonstrated by a simulation that the proposed technique gives similar performances to the conventional ULA and at the same time exhibits lower complexity.  相似文献   
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