High-frequency analysis of the Ellipticus antenna

Efficient numerical solution techniques have been developed and used to examine the electromagnetic fields that can be developed in the working volume of the CW Ellipticus antenna operated at frequencies from 100 kHz to 1 GHz. An exponentially tapered transition section is designed to obtain the desired illumination pattern in the working volume. The input transition section is needed for impedance matching and to drive efficiently the Ellipticus antenna. A parametric study is performed to ascertain the performance of the Ellipticus antenna for frequencies up to 1 GHz     

Microscopic simulation of electronic noise in semiconductormaterials and devices

We present a microscopic interpretation of electronic noise in semiconductor materials and two-terminal devices. The theory is based on Monte Carlo simulations of the carrier motion self-consistently coupled with a Poisson solver. Current and voltage noise operations are applied and their respective representations discussed. As application we consider the cases of homogeneous materials, resistors, n⁺nn ⁺ structures, and Schottky-barrier diodes. Phenomena associated with coupling between fluctuations in carrier velocity and self-consistent electric field are quantitatively investigated for the first time. At increasing applied fields hot-carrier effects are found to be of relevant importance in all the cases considered here. As a general result, noise spectroscopy is found to be a source of valuable information to investigate and characterize transport properties of semiconductor materials and devices     

Novel level-identifying circuit for flash multilevel memories

This paper presents a high-speed, small-area circuit specifically designed to identify the levels in the read out operation of a flash multilevel memory. The circuit is based on the analog computation of the Euclidean distance between the current read out from a memory cell and the reference currents that represent the different logic levels. An experimental version of the circuit has been integrated in a standard double-metal 0.7-μm CMOS process with a die area of only 140×100 μm². Operating under a 5-V power supply, this circuit identifies the read-out current of a memory cell, and associates it with the appropriate logic level in 9 ns     

Voiced speech excitation synthesis using a sinusoidal model

A modification to the `shape-invariant' sinusoidal speech model is proposed, whereby the phases of the component sinewaves used for the excitation are made to add coherently at each glottal closure. Applied to pitch and time-scale modification, higher quality synthetic speech is produced when large changes are required     

Current-mode A/D converter

The authors report the design of a new current-mode A/D converter, based on a modified successive-approximations model, in 1.2 μm CMOS technology. The proposed circuit is characterised by good accuracy and fast dynamic performance, low power consumption and small occupation area. SPICE simulations allow the design approach to be validated and the electrical performance of the ADC to be predicted     

Filter matrix estimation in automated DNA sequencing

In four-color fluorescence-based automated DNA sequencing, a 4×4 filter matrix parameterizes the relationship between the dye-intensity signals of interest and the data collected by an optical imaging system. The filter matrix is important because the estimated DNA sequence is based on the dye intensities that can only be recovered via inversion of the matrix. Here, the authors present a calibration method for the estimation of the columns of this matrix, using data generated through a special experiment in which DNA samples are labeled with only one fluorescent dye at a time. Simulations and applications of the method to real data are provided, with promising results     

Wideband microstrip array antenna with sidelobe cancellationchannels

An antenna array for wideband operation (up to 70%) is presented. The structure has low windloading area and consists of parallel printed circuit boards (PCB) with microstrip dipoles, feed network and metal fences placed between the PCBs. The low profile, low weight antenna array forms the main beam and three difference patterns for sidelobe cancellation. Experimental results are compared with calculations for both microstrip dipole and array     

High-performance automatic target recognition through data-specificVLSI

Under the Mojave configurable computing project, we have developed a system for achieving high performance on an automatic target recognition (ATR) application through the use of configurable computing technology. The ATR system studied here involves real-time image acquisition from a synthetic aperture radar (SAR). SAR images exhibit statistical properties which can be used to improve system performance. In this paper, the Mojave configurable computing system uses field programmable gate arrays (FPGA's) to implement highly specialized circuits while retaining the flexibility of programmable components. A controller sequences through a set of specialized circuits in response to real-time events. Computer-aided design (CAD) tools have been developed to support the automatic generation of these specialized circuits. The resulting configurable computing system achieves a significant performance advantage over the existing solution, which is based on application specific integrated circuit (ASIC) technology     

Modeling ion implantation of HgCdTe

Ion implantation of boron is used to create n on p photodiodes in vacancy-doped mercury cadmium telluride (MC.T). The junction is formed by Hg interstitials from the implant damage region diffusing into the MC.T and annihilating Hg vacancies. The resultant doping profile is n⁺/n^-/p, where the n⁺ region is near the surface and roughly coincides with the implant damage, the n^- region is where Hg vacancies have been annihilated revealing a residual grown-in donor, and the p region remains doped by Hg vacancy double acceptors. We have recently developed a new process modeling tool for simulating junction formation in MC.T by ion implantation. The interstitial source in the damage region is represented by stored interstitials whose distribution depends on the implant dose. These interstitials are released into the bulk at a constant, user defined rate. Once released, they diffuse away from the damage region and annihilate any Hg vacancies they encounter. In this paper, we present results of simulations using this tool and show how it can be used to quantitatively analyze the effects of variations in processing conditions, including implant dose, annealing temperature, and doping background.     

Storage performance-metrics and benchmarks

The metrics and benchmarks used in storage performance evaluation are discussed. The technology trends taking place in storage systems, such as disk and tape evolution, disk arrays, and solid-state disks, are highlighted. The current popular I/O benchmarks are then described, reviewed, and run on three systems: a DECstation 5000/200 running the Sprite Operating System, a SPARCstation 1+ running SunOS, and an HP Series 700 (Model 730) running HP-UX. Two approaches to storage benchmarks-LADDIS and a self-scaling benchmark with predicted performance-are also described