Investigation of Relationships between Grain Structure and Inhomogeneous Deformation by Means of Laboratory-Based Multimodal X-Ray Tomography: Strain Accuracy Analysis

Experimental Mechanics - The internal strain distribution developing during plastic deformation is important for understanding the mechanical properties of polycrystalline materials. Such...     

Increasing the Efficiency of Projection Models of Strip Lines

Journal of Communications Technology and Electronics - Abstract—The matrix coefficients of projection models of strip lines obtained using the Chebyshev basis are presented as a sum of...     

Correction to: Impact of leg bending in the patient-specific computational fluid dynamics of popliteal stenting

Acta Mechanica Sinica - A Correction to this paper has been published: https://doi.org/10.1007/s10409-021-01066-2     

Effect of Plasmon Resonance of Silver Nanoparticles on the Fluorescent Properties of Doxycycline

Journal of Analytical Chemistry - Silver nanoparticles modified with Eu3+ ions increase the intensity of the fluorescence signal by a factor of 125 in an analytical system containing doxycycline as...     

Composition and Antifungal Activity of Lipids from Seeds of Atriplex tatarica

Chemistry of Natural Compounds -     

Unsupervised Segmentation of Stereoscopic Video Objects: Constrained Segmentation Fusion Versus Greedy Active Contours

In this paper, we present a novel memory access reduction scheme (MARS) for two-dimension fast cosine transform (2-D FCT). It targets programmable DSPs with high memory-access latency. It reduces the number of memory accesses by: 1) reducing the number of weighting factors and 2) combining butterflies in vector-radix 2-D FCT pruning diagram from two stages to one stage with an efficient structure. Hardware platform based on general purpose processor is used to verify the effectiveness of the proposed method for vector-radix 2-D FCT pruning implementation. Experimental results validate the benefits of the proposed method with reduced memory access, less clock cycle and fewer memory space compared with the conventional implementation.