Analysis and architecture design of variable block-size motion estimation for H.264/AVC

Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory.     

Injection-locked Fabry-Pe/spl acute/rot laser with electronic feedback for clock recovery from high-speed OTDM signals

We demonstrate the use of an injection-locked Fabry-Pe/spl acute/rot laser diode with electronic feedback for base-rate clock recovery in N/spl times/10 Gb/s optical time-division-multiplexing (OTDM) systems. Injection-locking enhances the resonance frequency of the laser and the electrical feedback achieves strong resonance at the base-rate frequency of the injected data streams, enabling ultrastable electrical clock signal generation at the base rate of 10 GHz. Experimental demonstrations for clock recovery at 10 GHz from 40-Gb/s OTDM data streams and 4-1 demultiplexing of the data using the extracted clock after fiber transmission is presented. The timing jitter measured in the recovered electrical clock is less than 0.25 ps.     

3G网络中的IPv6 DNS服务器配置

说明了3G网络中IPv6递归DNS服务器地址配置的三种方法：路由器通告（RA）方案，DHCPv6方案，递归域名系统（DNS）服务器的公认任播地址方案，详细地说明了三种解决方案的操作特点。本文为3G中选择合适的方法进行主机DNS配置提供了指导。     

H.264/AVC技术进展及其务实发展策略思考

结合NGN及3G演进的固定、移动视频业务实际需求状况，论述H．264／AVC的重要技术进展及其务实发展策略。     

SafeNet如何超越SSL VPN

对许多企业而言,不仅需要能够简单部署的安全远程访问解决方案,而且还需要能够紧密地与企业已投资的身份管理系统进行集成的解决方案。为了满足安全远程访问的实时需求,SafeNet最近推出了无边界安全企业级访问服务器(Borderless SecurityEnterprise Access Server)。该产品不仅具备SSL VPN功能,而且利用特殊配置及设定来满足大型企业的严苛要求(快速建立安全存取控制解决方案,并提供迅速的ROI)。该产品安装在稳固且高效能的1U装置中,将IPSec及SSL VPN、稳固的用户认证、多方授权、端点安全兼容检查以及广泛的认证功能整合在一起,…     

结合RDF实现对XML文档的RBAC

文章提出了一种面向XML文档的基于XMLschema并结合RDF的访问控制模型,它实现了对XML文档的细粒度的安全访问控制,同时提供了对XML文档中associationsecurityobject的安全访问控制。     

信息安全风险评估的模糊多准则决策方法

基于ISO/IEC17799标准建立了一个综合的信息系统风险分析框架,并运用模糊多准则决策(FMCDM)方法计算信息安全风险,根据风险等级矩阵(RLM)对信息资产风险进行级别划分,最终建立评估信息资产相关风险的完整模型。     

人工免疫原理在网络入侵检测系统中的研究

文章分析了人工免疫系统的原理,简单建立了一种基于否定选择算法的网络入侵检测系统,引入了一种用于异常事件识别的r-字符块匹配规则,并对规则存在的漏洞进行了分析。     

浅谈DC/DC变换器控制新方法

文中针对DC/DC变换器的特点,在现有控制和建模方法的基础之上,对DC/DC变换器的现代控制方法进行了归纳和总结,简要讨论了其控制原理,并比较了各种现代控制方法的优缺点,最后对DC/DC变换器控制方法的发展作了一定的展望。     

面向空间应用的片上系统集成技术研究

文章采用一种新颖方法对商用IP进行可靠性提升、完善，同时进行容错结构设计,建立了拥有自主知识产权的专用加固型标准单元库，构建了面向空间应用的SoC设计方法与流程，形成了面向空间电子系统的系统集成设计平台，用该技术实现了面向卫星等空间应用的32位嵌入式RISC处理器SoC芯片，获得了一次投片成功。