A wide speed range and high precision position and velocity measurements chip with serial peripheral interface

This paper presents a VLSI chip, with a serial peripheral interface (SPI), that obtains position and velocity measurements from incremental optical encoder feedback. It combines period and frequency countings to provide velocity estimates with good dynamic behavior over a wide speed range (10 Hz-50 MHz). By sensing the velocity of the encoder, it reserves the computational power of a supervisory microcontroller, and subsequently enhances the performance of the total system. It is compact with lower power consumption when compared to traditional FPGA implementations. Although designed for use in the control unit of a medical robot with 34-axes and tight space and power constraints, it can be readily used in other applications. It is implemented in a 2P3 M 0.5 μm CMOS process and consumes 4.82 mW power with active area of 0.45 mm².     

Computational analysis of the refractive index of multiple quantum wells for QWSC applications

In this paper, the authors extend on previous work regarding a new approach to calculating the refractive index of the quantum wells of a quantum well solar cell device. The new approach is computational and considers the presence of an electric field perpendicular to the quantum well layers. The model is based on the modified single effective oscillator (MSEO) model. The MSEO model is dependent upon three specific parametric equations. Using the relationships between these equations and how electric field effects these three parameters. The effects of the electric field on the refractive index of the quantum well layer can be determined. Computational analysis under AM 1.5 conditions for a hypothetical quantum well structure is performed with any discrepancies in the approach discussed.     

Analog signal generator for BIST of wideband IF signals bandpass sigma-delta modulator

This paper presents improvements in generation of wideband and high dynamic range analog signal for area-efficient MADBIST, especially for the on-chip testing of wireless communication IF digitizing sigma-delta modulator chip. Via increasing the order of the one-bit bandpass sigma-delta modulation algorithm up to 12 and using finite repetitious bitstream approximating scheme, it can achieve great improvements in signal bandwidth instead of purity at the cost of very little hardware overhead. Another contribution in this work is to provide the theoretical analysis of the reconstructed signal degradation due to harmonic distortion and clock jitter. Such on-chip analog stimulus generation scheme is especially fit for IF digitizing bandpass sigma-delta modulator chip's production-time testing and in-the-field diagnostics. The technique can also be extended to mixed-signal communication SoC built-in-self-test.