The effect of traffic noise on sleep of young adults in their homes

The disturbance of sleep by traffic noise is a major problem area in noise pollution. Extensive laboratory tests using multichannel electroencephalograms (EEG) have been carried out by many workers to determine the general response of people when exposed to noise during sleep. An experimental technique for obtaining results in people's homes has been developed using a simplified one-channel EEG. The responses of six people in the age range 19-24 were measured. A significant correlation was found between sleep disturbance and traffic noise when the noise is expressed in EPNdB. In the home experiments the subjects appeared to be approximately 10 dB less sensitive to noises than laboratory subjects for similar noise exposure. There also appeared to be some adaptation to the noise exposure; however, only one subject was tested for a period of 20 days and was insufficient to give definite results on adaptation.     

Nanolayered lightweight flexible shields with multidirectional optical transparency

New nanolayered coatings are designed and deposited on flexible plastic substrate having the thickness of 100 /spl mu/m, in order to realize lightweight ultrathin transparent shielding foils. The structure of the coating is optimized considering three figures of merit: the average transmittance in the visible range for normal incidence, the normalized average transmittance for oblique incidence at 550 nm, and the transmittance quality factor. The nanotechnology exploited for the deposition of the transparent metals is the dual ion beam sputtering. Tests of durability, optical transmission, and shielding effectiveness demonstrate that the film has a high adhesion under mechanical solicitation, high resistance against aging, peak transmittance in the visible range higher than 70%, omnidirectional properties in the range 0/spl deg/-60/spl deg/, and shielding effectiveness of 40 dB up to 6 GHz.     

Minimizing power dissipation in optical interconnects at low voltage using optimal modulator design

A strong motivation for insertion of optical interconnects in short-distance applications such as chip-to-chip or back-plane communication, apart from high bit rates, is their potential to achieve these bit rates at low power compared to the currently prevalent copper based interconnects. Thus, it is imperative to construct design methodologies which minimize the total optical link power dissipation. We present one such methodology, where we optimize the quantum-well modulators to minimize the power dissipation in modulator-based optical interconnects. In the first part of the paper, the focus is on obtaining the optimal modulator metrics [contrast ration (CR) and insertion loss], which yield the lowest total power (receiver and the modulator). The trends are studied as a function of the input laser power and bit rate. Having obtained the desirable modulator metrics and the corresponding power dissipation, in the second part, the focus is on the feasibility of these metrics in the light of voltage swing constraints. The biggest concern with the modulator based optical link is the low CR, especially at low voltage swing. While studying these concerns, we also provide insight into the physical design of the modulator including, its intrinsic region thickness, pre-bias voltage, and the size and the number of quantum-wells. Specifically, we outline the method to obtain the design parameters, which allows minimum power dissipation with the least laser power. This ultimately yields higher aggregate I/O bandwidth for chip to chip communication in power limited chips.     

Investigation of the source/drain asymmetric effects due to gate misalignment in planar double-gate MOSFETs

A planar double-gate SOI MOSFET (DG-SOI) with thin channel and thick source/drain (S/D) was successfully fabricated. Using both experimental data and simulation results, the S/D asymmetric effect induced by gate misalignment was studied. For a misaligned DG-SOI, there is gate nonoverlapped region on one side and extra gate overlapped region on the other side. The nonoverlapped region introduces extra series resistance and weakly controlled channel, while the extra overlapped region introduces additional overlap capacitance and gate leakage current. We compared two cases: bottom gate shift to source side (DG/spl I.bar/S) and bottom gate shift to drain side (DG/spl I.bar/D). At the same gate misalignment value, DG/spl I.bar/S resulted in a larger drain-induced barrier lowering effect and smaller overlap capacitance at drain side than DG/spl I.bar/D. Because of reduced drain-side capacitance, the speed of three-stage ring oscillator of DG/spl I.bar/S, with 20% gate misalignment length (L/sub mis/) over gate length (L/sub g/), or L/sub mis//L/sub g/=20%, was faster than that of two-gate aligned DG-SOI.     

Algebraic decoding of (103, 52, 19) and (113, 57, 15) quadratic residue codes

In this paper, two algebraic decoders for the (103, 52, 19) and (113, 57, 15) quadratic residue codes, which have lengths greater than 100, are presented. The results have been verified by software simulation that programs in C++ language have been executed to check possible error patterns of both quadratic residue codes.     

High performance laser with nanopatterned active layer by selective area epitaxy

Lasers containing a nanopatterned active layer demonstrating excellent threshold characteristics are presented. The nanopatterned active layer is fabricated using high-resolution electron beam lithography and selective-area metal organic chemical vapour deposition crystal growth. Results demonstrating an order of magnitude improvement over previous results are reported.     

Coding approaches to fault tolerance in linear dynamic systems

This paper discusses fault tolerance in discrete-time dynamic systems, such as finite-state controllers or computer simulations, with focus on the use of coding techniques to efficiently provide fault tolerance to linear finite-state machines (LFSMs). Unlike traditional fault tolerance schemes, which rely heavily-particularly for dynamic systems operating over extended time horizons-on the assumption that the error-correcting mechanism is fault free, we are interested in the case when all components of the implementation are fault prone. The paper starts with a paradigmatic fault tolerance scheme that systematically adds redundancy into a discrete-time dynamic system in a way that achieves tolerance to transient faults in both the state transition and the error-correcting mechanisms. By combining this methodology with low-complexity error-correcting coding, we then obtain an efficient way of providing fault tolerance to k identical unreliable LFSMs that operate in parallel on distinct input sequences. The overall construction requires only a constant amount of redundant hardware per machine (but sufficiently large k) to achieve an arbitrarily small probability of overall failure for any prespecified (finite) time interval, leading in this way to a lower bound on the computational capacity of unreliable LFSMs.     

Self-Adapting Linear Algebra Algorithms and Software

One of the main obstacles to the efficient solution of scientific problems is the problem of tuning software, both to the available architecture and to the user problem at hand. We describe approaches for obtaining tuned high-performance kernels and for automatically choosing suitable algorithms. Specifically, we describe the generation of dense and sparse Basic Linear Algebra Subprograms (BLAS) kernels, and the selection of linear solver algorithms. However, the ideas presented here extend beyond these areas, which can be considered proof of concept.     

High-gain pseudomorphic InGaAs base ballistic hot-electron device

A high-gain ballistic hot-electron device is described. The GaAs-AlGaAs heterostructure device, with a 21-mm-thick pseudomorphic In _0.12Ga_0.88As base, had a current gain of 27 at 77 K and 41 at 4.2 K. As characteristically seen in ballistic devices, transfer into the L valley limited the maximum gain. The Γ-L valley separation in the strained In_0.12Ga_0.88As was estimated to be about 380 meV