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71.
基于VHDL实现单精度浮点数的加/减法运算 总被引:1,自引:0,他引:1
研究了单精度浮点数加/减法的结构及其设计方法,并在Aldec公司的Active—HDL软件环境下,采用VHDL语言进行设计,并进行了仿真验证,计算精度可以达到10^-7。 相似文献
72.
We report on Raman scattering of VO2 films prepared by radio frequency magnetron sputtering under different conditions. Our investigations revealed that the dominated Raman peaks shift towards high frequency for both V-rich and O-rich VO2 films, compared with the stoichiometry VO2 films. The experimental evidence is presented and the cause for nonstoichiometry dependence of Raman spectra of VO2 films is discussed. 相似文献
73.
74.
无界区域R1上推广的B-BBM方程的整体吸引子 总被引:4,自引:0,他引:4
本文研究了无界区域R^1上推广的B—BBM方程的长时间动力学行为,证明了该方程整体吸引子的存在性. 相似文献
75.
Kuo-Ming Chao Muhammad Younas Nick Godwin Pen-Choug Sun 《International Journal of Wireless Information Networks》2006,13(2):141-150
The popularity of grid services has widened their application to numerous domains and increased the utilization of computational resources. In order to create more incentives for the resources owners to lease their resources and prevent users from wasting the resources, the introduction of a market-oriented grid is inevitable. However, the issues for the negotiation between service provider and consumer over the supply and demand of resources can be complex, with highly interdependent issues. In this research, a simulated automated negotiation mechanism including a co-evolutionary mechanism and a modified game theory approach is proposed, to assist them in reaching an agreement over the conflicting issues. In the proposed architecture, the co-evolution process is able to reduce the multiple dimensional search space into a two-dimension search space and identify the appropriate negotiation strategies for the negotiating agents to form a payoff matrix which can be used for the game theory related stage of their interaction. The multiple stage negotiation process is introduced to improve the negotiation result. In this paper, an application which requires a large amount of computational resources to process the data generated from mobile devises is used to demonstrate that the proposed system is able to resolve the conflicts and obtain a valid solution. 相似文献
76.
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78.
Reliability-estimation and stopping-rules for software testing,based on repeated appearances of bugs
Software-testing (debugging) is one of the most important components in software development. An important question in the debugging process is, when to stop. The choice is usually based on one of two decision criteria: (1) when the reliability has reached a given threshold, and (2) when the gain in reliability cannot justify the testing cost. Various stopping rules and software reliability models are compared by their ability to deal with these two criteria. Two new stopping rules, initiated by theoretical study of the optimal stopping rule based on cost, are more stable than other rules for a large variety of bug structures. The 1-step-ahead stopping rules based on the Musa et. al. basic execution and logarithmic Poisson models, as well as the stopping rule by Dalal and Mallows (1990), work well for software with many relatively small bugs (bugs with very low occurrence rates). The comparison was done by simulation 相似文献
79.
B-Spline with Symplectic Algorithm Method for Solution of Time-Dependent Schrodinger Equations 下载免费PDF全文
A B-spline with the symplectic algorithm method for the solution of time-dependent Schrodinger equations (TDSEs) is introduced. The spatial part of the wavefunction is expanded by B-spline and the time evolution is given in a symplectic scheme. This method allows us to obtain a highly accurate and stable solution of TDSEs. The effectiveness and efficiency of this method is demonstrated by the high-order harmonic spectra of one-dimensional atoms in comparison with other references. 相似文献
80.
Chao C.-J. Wong S.-C. Chen M.-J. Liew B.-K. 《Semiconductor Manufacturing, IEEE Transactions on》1998,11(4):615-623
Interconnect parasitic parameters in integrated circuits have significant impact on circuit speed. An accurate monitoring of these parameters can help to improve interconnect performance during process development, provide information for circuit design, or give useful reference for circuit failure analysis. Existing extraction methods either are destructive (such as SEM measurement) or can determine only partial parasitic parameters (such as large capacitor measurement). In this paper, we present a new method for extracting interconnect parasitic parameters, which can simultaneously determine the interlayer and intralayer capacitances, line resistance, and effective line width. The method is based on two test patterns of the same structure with different dimensions. The structure consumes less wafer area than existing methods. The method shows good agreement with SEM measurement of dielectric thickness in both nonglobal planarized and chemical-mechanical polished processes, and gives accurate prediction of the process spread of a ring oscillator speed over a wafer 相似文献