大亚湾沉积物中氨基酸的垂直分布棗沉积物柱样W0中的游离氨基酸

用邻苯二甲醛（OPA）－3－巯基丙酸（3－MPA）柱前衍生高效液相色谱法测定了采自大亚湾近岸海域的一个长60cm的沉积物柱样W0中15种游离氨基酸（FAA）的含量，结果表明，W0中FAA总量在0．83－2．69mmol/kg之间，15种FAA以及FAA总量均随深度而以指数曲线降低，对氨基酸组成的分析表明，天冬氨酸，甘氨酸，组氨酸和苯丙氨酸的摩尔分数随深度而上升，苏氨酸，精氨酸，缬氨酸和异亮氨酸的摩尔分数随浓度而下降，其他氨基酸的摩尔分数随深度无显著变化，甘氨酸，丙氨酸，天冬氨酸，谷氨酸，丝氨酸是W0中含量最丰富的氨基酸，其摩尔数依次为28．1％，16．0％，14．7％，10．6％和7．2％。     

氧化石墨烯表面生长铕配合物纳米晶及其荧光性能研究

本文利用π-π堆积的方式在氧化石墨烯(GO)表面生长了Eu(Ⅲ)配合物纳米晶。傅立叶变换红外光谱(FTIR),透射电子显微镜(TEM),X-射线衍射(XRD)的表征证明,Eu(Ⅲ)配合物纳米晶成功地生长在氧化石墨烯表面。荧光光谱分析证明,复合材料具有一定的荧光性能,其中Eu³⁺的猝灭浓度为18wt%。热重分析显示,复合材料的热稳定性也比纯配合物有了明显的提高。     

肌红蛋白在磷脂-月桂酸修饰的玻碳电极上的电化学行为及其分析应用

报道了肌红蛋白(Mb)在磷脂、月桂酸修饰的玻碳电极上的电化学行为 ,在 +0.2～ -0.7V(vs.Ag/AgCl)电位范围内 ,于pH6.0的0.01mol·L-1的KH2PO4、Na2HPO4底液中 ,肌红蛋白产生不可逆的还原电流峰 ;还原峰电流与肌红蛋白浓度在2.25×10-8 ～1.40×10-6 mol·L-1 范围内呈良好线性关系 ;线性回归方程为Ip(μA)=-0.01419 +0.2382cMb(10 -7mol·L -1) ,线性回归系数r(10)为0.998 ,检出限为1.20×10 -8mol·L -1,该电极可作为检测肌红蛋白的新型的高灵敏度电化学生物传感器。     

Plakinidines生物碱的研究进展

Plakinidines是从海洋生物中分离得到的一种活性物质,也是人们首次发现具有吡咯[2,3,4-kl]吖啶骨架结构的天然产物,相应的生物活性探讨与合成工作也相继地展开.在本文中,结合本课题组的合成工作报道plakinidines的发现、生物活性以及相关的合成进展.     

1．55μm-MQW-SLD连续工作状态下的性能

全面地测试并分析了峰值波长约为1．55μm的InGaAsP／InP多量子阱型超辐射激光二极管(MQW—SLD)模块的输出光功率、光谱和消光比随注入电流及温度变化的关系。结果表明：在连续工作状态下,此SLD模块显示了软阈值特性,其性能随着注入电流和温度的变化而变化。     

一个13位8兆采样率流水线模数转换器

A 13-bit 8 MSample/s high-accuracy CMOS pipeline ADC is proposed. At the input, the sample-andhold amplifier （SHA） is removed for low power and low noise; meanwhile, an improved sampling circuit is adopted to alleviate the clock skew effect. On-chip bias current is programmable to achieve low power dissipation at different sampling rates. Particularly, drain-to-source voltages in the operational amplifiers （opamps） are fixed to ensure high DC gain within the variant range of the bias current. Both on-chip and off-chip decoupling capacitors are used in the voltage reference circuit in consideration of low power and stability. The proposed ADC was implemented in 0.18-μm 1P6M CMOS technology. With a 2.4-MHz input, the measured peak SNDR and SFDR are 74.4 and 91.6 dB at 2.5 MSample/s, 74.3 and 85.4 dB at 8.0 MSample/s. It consumes 8.1, 21.6, 29.7, and 56.7 mW （including I/O drivers） when operating at 1.5, 2.5, 5.0, and 8.0 MSample/s with 2.7 V power supply, respectively. The chip occupies 3.2 mm^2, including I/O pads.     

跳频通信电台组网的建模与仿真

随着跳频通信在无线通信中日益广泛的应用,跳频电台的组网也就成为一个重要的课题。跳频碰撞作为跳频电台组网的关键技术,但这方面可见的研究文献却很少。本文首先介绍了跳频电台组网理论容限的数学模型,然后以53个有效频点为例,设计出了非重复碰撞的跳频图案。最后,对异步组网时跳频图案的性能和碰撞问题进行了仿真。     

采用电压复位技术的像素级模数转换器

This paper presents a 50 Hz 15-bit analog-to-digital converter(ADC) for pixel-level implementation in CMOS image sensors.The ADC is based on charge packets counting and adopts a voltage reset technique to inject charge packets.The core circuit for charge/pulse conversion is specially optimized for low power,low noise and small area.An experimental chip with ten pixel-level ADCs has been fabricated and tested for verification.The measurement result shows a standard deviation of 1.8 LSB for full-scale output.The ADC has an area of 4545 m2 and consumes less than 2 W in a standard 1P-6M 0.18 m CMOS process.     

一种应用于能量攫取系统的低功耗的工作于亚阈值区域的基准电压源的设计

We propose a bandgap reference, which works in sub-threshold regions to the reduce power consumption in applications such as those in energy harvesting systems that stimulate the development of power management for low power consumption applications.Measurements shows that the supply current of the proposed bandgap reference is only 6.87 μA, including a voltage buffer consuming 3.6 μA of supply current, when the supply voltage is 5 V.The supply voltage can vary from 3 to 11 V and the line regulation of the proposed bandgap reference output voltage is 0.875 mV/V at room temperature.The temperature coefficiency is 88.9 ppm from 10 to 100° C when the supply voltage is 5 V.     

一款便携式移动应用的低成本超高频无源射频识别读写器收发机芯片设计

A low cost integrated transceiver for mobile UHF passive RFID reader applications is implemented in a 0.18μm CMOS process. The transceiver contains an OOK modulator and a power amplifier in the transmitter chain, an IQ direct-down converter, variable-gain amplifiers, channel-select filters and a 10-bit ADC in the receiver chain. The measured output PldB power of the transmitter is 17.6 dBm and the measured receiver sensitivity is -70 dBm. The on-chip integer N synthesizer achieves a frequency resolution of 200 kHz with a phase noise of -104 dBc/Hz at 100 kHz frequency offset and -120.83 dBc/Hz at 1 MHz frequency offset. The transmitter, the receiver and the frequency synthesizer consume 201.34, 25.3 and 54 mW, respectively. The chip has a die area of 4 × 2.5 mm^2 including pads.