集成双极型晶体管模型参数的总体优化提取

本文给出了采用分步式总体优化提取双极GP模型直流参数的方法,其中包括双向目标函数的建立、参数提取等级的划分和初值的确定,以及模型参数的全城总体提取。文中介绍了用该法编制的程序及其成功的应用。     

基于漏区边界曲率分析的射频RESURF LDMOS耐压与导通电阻优化

分析了漏区边界曲率半径与射频RESURF LDMOS击穿电压的关系,指出漏区边界的弯曲对RESURF技术的效果具有强化作用.理论分析与模拟结果表明,满足RESURF条件时,提高漂移区掺杂浓度或掺杂深度的同时相应减小漏区边界的曲率半径,可以在维持击穿电压不变的前提下,明显降低导通电阻.     

集成电路可制造性经济学模型（一）—广义前道工序模型

文章从集成电路（ＩＣ）发展规律出发，提出了可制造性设计的必要性和迫切性，并提出了基于可制造性设计的ＩＣ前道工序成本模型，为实现成本驱动设计的自动化和最优化打下必要的基础。     

^（60）Co γ-rays irradiation effect in DC performance of AlGaN/GaN high electron mobility transistors

Unpassivated/passivated AlGaN/GaN high electron mobility transistors （HEMTs） were exposed to 1.25 MeV 60Co γ-rays at a dose of 1 Mrad（Si）. The saturation drain current of the unpassivated devices decreased by 15% at 1 Mrad γ-dose, and the maximal transconductance decreased by 9.1% under the same condition; more- over, either forward or reverse gate bias current was significantly increased, while the threshold voltage is relatively unaffected. By sharp contrast, the passivated devices showed scarcely any change in saturation drain current and maximal transconductance at the same γ dose. Based on the differences between the passivated HEMTs and un- passivated HEMTs, adding the C–V measurement results, the obviously parameter degradation of the unpassivated AlGaN/GaN HEMTs is believed to be caused by the creation of electronegative surface state charges in sourcegate spacer and gate–drain spacer at the low dose （1 Mrad）. These results reveal that the passivation is effective in reducing the effects of surface state charges induced by the 60Co γ-rays irradiation, so the passivation is an effective reinforced approach.     

Surface morphology of [110] a-plane GaN growth by MOCVD on [1■02] r-plane sapphire

Nonpolar a-plane [110] GaN has been grown on r-plane [1■02] sapphire by MOCVD, and investigated by high resolution X-ray diffraction and atomic force microscopy. As opposed to the c-direction, this particular orientation is non-polar, and it avoids polarization charge, the associated screening charge and the consequent band bending. Both low-temperature GaN buffer and high-temperature AlN buffer are used for a-plane GaN growth on r-plane sapphire, and the triangular pits and pleat morphology come forth with different buffers, the possible reasons for which are discussed. The triangular and pleat direction are also investigated. A novel modulate buffer is used for a-plane GaN growth on r-plane sapphire, and with this technique, the crystal quality has been greatly improved.     

用MOCVD在r面蓝宝石衬底上生长的a面GaN的独特电学性质研究

Nonpolar （1120） a-plane GaN films have been grown by low-pressure metal-organic vapor deposition on r-plane （1102） sapphire substrate. The structural and electrical properties of the a-plane GaN films are investigated by high-resolution X-ray diffraction （HRXRD）, atomic force microscopy （AFM） and van der Pauw Hall measurement. It is found that the Hall voltage shows more anisotropy than that of the c-plane samples; furthermore, the mobility changes with the degree of the van der Pauw square diagonal to the c direction, which shows significant electrical anisotropy. Further research indicates that electron mobility is strongly influenced by edge dislocations.     

间歇供氨高温AlN缓冲层对AlGaN/GaN异质结的影响

研究了以间歇供氨的方法直接高温生长的氮化铝为缓冲层的AlGaN/GaN材料,高温氮化铝的应用可以有效的提高晶体质量和表面形貌,并且二维电子气的浓度和迁移率也得到改善。     

MOS AlGaN/GaN HEMT研制与特性分析

研制出在蓝宅石衬底上制作的MOS AIGaN/GaN HEMT.器件栅长1um,源漏间距4um,采用电子束蒸发4nm的Si02做栅介质.在4V栅压下器件饱和电流达到718mA/mm,最大跨导为172mS/mm,ft和fmax分别为8.1和15.3GHz.MOS HEMT栅反向泄漏电流与未做介质层的肖特基栅相比,在反偏10V时由2.1×10-8mA/mm减小到8.3×10-9mA/mm,栅漏电流减小2个数量级.MOS AIGaN/GaN HEMT采用薄的栅介质层,在保证减小栅泄漏电流的同时未引起器件跨导明显下降.     

SEU 加固存储单元中的多节点翻转

使用3D器件模拟了SEU加固单元的多节点翻转(multiple node upset,MNU)问题.结果表明瞬时悬空节点和电荷横向扩散是MNU的关键原因.对比了MNU和不同存储单元之间的MBU(multiple bit upset),发现它们之间的特点存在较大差异.最后讨论了避免MNU的方法.     

VLSI容错设计研究进展(2)——功能成品率与可靠性的研究

带冗余的集成电路的成品率的估计对制造者来说是一个非常重要的问题。文中将集中分析和讨论带冗余的成品率模型和可靠性,给出了该领域研究进展的最新结果,并指出了进一步研究的方向和策略。