排序方式: 共有33条查询结果,搜索用时 15 毫秒
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设计了适用于多种高速通信指标(USB2.0, PCI-E,Rapid IO)的CMOS模拟均器。通过合并低频和高频支路以降低两个支路的延迟效应,同时均衡滤波器具有比较大的输入阻抗,这有利于通过级联方式来进一步提高高频增益。本文所实现的电路结构在25dB的PCB线路衰减条件下,能够均衡频率范围从1Gbps到3.3Gbps的信号。偏置电路采用复制电路技术,有利于方便的调整主要工作模块的直流工作点。为了抑制前级输出共模对后级电路的影响,在信号的输入端引入了交流耦合。该芯片在0.18um 1P6M工艺下进行了流片验证,整体芯片面积为0.6 x 0.57 mm2. 测试结果显示,该模拟均衡器能够在25dB FR4 PCB信道衰减下,对速率为3.3Gbps的信号实现自适应均衡,整体功耗大约为23.4mw. 相似文献
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This paper describes using a high-speed continuous-time analog adaptive equalizer as the front-end of a receiver for a high-speed serial interface,which is compliant with many serial communication specifications such as USB2.0,PCI-E2.0 and Rapid 10.The low and high frequency loops are merged to decrease the effect of delay between the two paths,in addition,the infinite input impedance facilitates the cascade stages in order to improve the high frequency boosting gain.The implemented circuit architecture could facilitate the wide frequency range from 1 to 3.3 Gbps with different length FR4-PCB traces,which brings as much as 25 dB loss.The replica control circuits are injected to provide a convenient way to regulate common-mode voltage for full differential operation.In addition,AC coupling is adopted to suppress the common input from the forward stage.A prototype chip was fabricated in 0.18-μm 1P6M mixed-signal CMOS technology.The actual area is 0.6×0.57 mm~2 and the analog equalizer operates up to 3.3 Gbps over FR4-PCB trace with 25 dB loss.The overall power dissipation is approximately 23.4 mW. 相似文献
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A multi-standard compatible transmitter with pre-emphasis for high speed serial links is presented. Based on the comparison between voltage mode(VM) and current mode(CM) output driver architectures,a low power CM output driver with reverse scaling and bias current filtering technique is proposed.A 2-tap pre-emphasis filter is used to reduce the intersymbol interference caused by the low-pass channel,and a high speed,low power combined serializer is implemented to convert 10 bit parallel data into a serial data stream.The whole transmitter is fabricated in 65 nm 1.2 V/2.5 V CMOS technology.It provides an eye height greater than 800 mV for data rates of both 2.5 Gb/s and 5 Gb/s.The output root mean square jitter of the transmitter at 5 Gb/s is only 9.94 ps without pre-emphasis.The transmitter consumes 41.2 mA at 5 Gb/s and occupies only 240×140μm~2. 相似文献
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研究了B值随机元阵列的完全收敛性质.主要通过使用一些关于B值独立随机变量的矩不等式和E tem and i不等式,把相关文献中的主要结果从实值情况推广到了p(1 q 2)型的Banach空间中,同时把他们的定理条件进行了极大的简化.此外进一步弱化定理的条件,给出了其它形式的完全收敛定理. 相似文献
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本文对Toupin-Бердичевский定理的条件和结论进行了考查,从而说明并以实例演示该定理不能作为弹性力学圣维南原理的数学表达. 相似文献
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帧中继作为一种标准的用户技术可用于数据、语音和图象业务,且广泛应用于局域网之间的互联,为数据通信业务提供了有效手段.目前在网上已有近 400客户使用点至多点的局域网互连方式进行各自网络的数据、语音和图象通信.这些用户广泛分布于国家部委、金融、保险及集团公司中.经济、合理、有效地实现数据通信已成为社会发展的要求. 相似文献
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赵建中 《数学的实践与认识》2005,35(4):171-175
给出了M—矩阵,N0 —矩阵的一些不等式,并证明某些不等式等式成立的充要条件,推广了文献中F0 —矩阵的一个不等式,并给出了Z—矩阵的特征多项式系数的一些不等式. 相似文献
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通过邮电发展史,简介各种时期的管理模式及取得的效果。结合当前电信业的竞争形势,分析提出发展在于创新,关键在于管理。并提出三个方面的创新管理:人力资源管理、财务管理、经营管理。 相似文献