Study on the negative bias temperature instability effect under dynamic stress

This paper studies negative bias temperature instability (NBTI) under alternant and alternating current (AC) stress.Under alternant stress,the degradation smaller than that of single negative stress is obtained.The smaller degradation is resulted from the recovery of positive stress.There are two reasons for the recovery.One is the passivation of H dangling bonds,and another is the detrapping of charges trapped in the oxide.Under different frequencies of AC stress,the parameters all show regular degradation,and also smaller than that of the direct current stress.The higher the frequency is,the smaller the degradation becomes.As the negative stress time is too small under higher frequency,the deeper defects are hard to be filled in.Therefore,the detrapping of oxide charges is easy to occur under positive bias and the degradation is smaller with higher frequency.     

Improvement of reverse blocking performance in vertical power MOSFETs with Schottky–drain-connected semisuperjunctions

To enhance the reverse blocking capability with low specific on-resistance,a novel vertical metal-oxidesemiconductor field-effect transistor(MOSFET) with a Schottky-drian(SD) and SD-connected semisuperjunctions(SDD-semi-SJ),named as SD-D-semi-SJ MOSFET is proposed and demonstrated by two-dimensional(2D) numerical simulations.The SD contacted with the n-pillar exhibits the Schottky-contact property,and that with the p-pillar the Ohmic-contact property.Based on these features,the SD-D-semi-SJ MOSFET could obviously overcome the great obstacle of the ineffectivity of the conventional superjunctions(SJ) or semisuperjunctions(semi-SJ) for the reverse applications and achieve a satisfactory trade-off between the reverse breakdown voltage(BV) and the specific on-resistance(R_(on)A).For a given pillar width and n-drift thickness,there exists a proper range of n-drift concentration(N),in which the SD-D-semi-SJ MOSFET could exhibit a better trade-off of R_(on)A-BV compared to the predication of SJ MOSFET in the forward applications.And what is much valuable,in this proper range of N,the desired BV and good trade-off could be achieved only by determining the pillar thickness,with the top assist layer thickness unchanged.Detailed analyses have been carried out to get physical insights into the intrinsic mechanism of R_(on)A-BV improvement in SD-D-semi-SJ MOSFET.These results demonstrate a great potential of SD-D-semi-SJ MOSFET in reverse applications.     

SILC during NBTI Stress in PMOSFETs with Ultra-Thin SiON Gate Dielectrics

Negative bias temperature instability （NBTI） and stress-induced leakage current （SILC） both are more serious due to the aggressive scaling lowering of devices. We investigate the SILC during NBTI stress in PMOSFETs with ultra-thin gate dielectrics. The SILC sensed range from -1 V to 1 V is divided into four parts： the on-state SILC, the near-zero SILC, the off-state SILC sensed at lower positive voltages and the one sensed at higher positive voltages. We develop a model of tunnelling assisted by interface states and oxide bulk traps to explain the four different parts of SILC during NBTI stress.     

上覆单相弹性层饱和地基上弹性基础的竖向振动分析

基于Biot动力控制方程,运用Fourier积分变换技术,并按照混合边值条件和连续条件建立了上覆单相弹性层饱和地基上弹性基础竖向振动的对偶积分方程.利用正交多项式将对偶积分方程化简,得到了动力柔度系数随无量纲频率b0的变化关系曲线,从而得到了上覆单相弹性层饱和地基上弹性基础的竖向振动规律.数值分析结果表明,对于弹性基础,当弹性基础的挠曲刚度较大时,发现弹性基础的竖向振动特性与刚性基础的类同,可忽略挠曲刚度对竖向振动的影响,且当无量纲频率较小的时候,动力柔度系数Cv随着无量纲频率b0的变化而发生显著的变化,但当无量纲频率b0较大的时候,动力柔度系数Cv受无量纲频率的影响较小,甚至基本上不受影响.当弹性基础的挠曲刚度较小时,随着挠曲刚度的减小,弹性基础的竖向振动将发生显著的变化,动力柔度系数Cv的实部和虚部的绝对值均变大.     

无模板剂合成用于超级电容器的二氧化锰/石墨烯复合材料

以尿素、四水合氯化锰和氧化石墨烯为原料,采用水热法并通过热分解制备了一种具有石墨烯包覆结构的石墨烯-二氧化锰复合材料,利用扫描电子显微镜、X射线衍射、比表面积（BET）、拉曼光谱和热失重等技术对其形貌、晶体结构及表面结构进行了表征;在三电极条件下利用循环伏安法、恒流充放电法和交流阻抗法测试了材料的电化学性能,并考察了不同石墨烯含量对材料比电容的影响. 结果表明,在不添加模板剂的条件下制备的复合材料中二氧化锰是具有介孔结构的α-MnO₂,当复合15%（质量分数）的石墨烯后材料的比表面积从109 m²·g^-1提高到168 m²·g^-1. 复合材料具有更好的电化学性能,在0.2 A·g^-1电流密度下复合材料的比电容达到最大值（454 F·g^-1）,远高于纯二氧化锰的值（294 F·g^-1）. 在2 A·g^-1的电流密度下恒流充放电2000 次后复合材料的比电容保持率为92%.     

Negative bias-induced threshold voltage instability and zener/interface trapping mechanism in GaN-based MIS-HEMTs

We investigate the instability of threshold voltage in D-mode MIS-HEMT with in-situ SiN as gate dielectric under different negative gate stresses.The complex non-monotonic evolution of threshold voltage under the negative stress and during the recovery process is induced by the combination effect of two mechanisms.The effect of trapping behavior of interface state at SiN/AlGaN interface and the effect of zener traps in AlGaN barrier layer on the threshold voltage instability are opposite to each other.The threshold voltage shifts negatively under the negative stress due to the detrapping of the electrons at SiN/AlGaN interface,and shifts positively due to zener trapping in AlGaN barrier layer.As the stress is removed,the threshold voltage shifts positively for the retrapping of interface states and negatively for the thermal detrapping in AlGaN.However,it is the trapping behavior in the AlGaN rather than the interface state that results in the change of transconductance in the D-mode MIS-HEMT.     

Effect of heavy ion irradiation on the interface traps of AlGaN/GaN high electron mobility transistors

AlGaN/GaN high electron mobility transistors (HEMTs) were irradiated with heavy ions at various fluences. After irradiation by 2.1 GeV¹⁸¹ Ta³²⁺ ions, the electrical characteristics of the devices significantly decreased. The threshold voltage shifted positively by approximately 25% and the saturation currents decreased by approximately 14%. Defects were induced in the band gap and the interface between the gate and barrier acted as tunneling sites, which increased the gate current tunneling probability. According to the pulsed output characteristics, the amount of current collapse significantly increased and more surface state traps were introduced after heavy ion irradiation. The time constants of the induced surface traps were mainly less than 10 μs.     

Effect of Channel Length and Width on NBTI in Ultra Deep Sub-Micron PMOSFETs

The effects of channel length and width on the degradation of negative bias temperature instability （NBTI） are studied. With the channel length decreasing, the NBTI degradation increases. As tile channel edges have more damage and latent damage for the process reasons, the device can be divided into three parts： the gate and source overlap region, the middle channel region, and the gate and drain overlap region. When the NBTI stress is applied, the non-uniform distribution of the generated defects in the three parts will be generated due to the inhomogeneous degradation. With tile decreasing channel length, tile channel edge regions will take up a larger ratio to the middle channel region and the degradation of NBTI is enhanced. The channel width also plays an important role in the degradation of NBTI. There is an inflection point during the decreasing channel width. There are two particular factors： the lower vertical electric field effect for the thicker gate oxide thickness of the sha/low trench isolation （STI） edge and the STI mechanical stress effecting on the NBTI degradation. The former reduces and the latter intensifies the degradation. Under the mutual compromise of the both factors, when the effect of the STI mechanical stress starts to prevail over the lower vertical electric field effect with the channel width decreasing, the inflection point comes into being.     

Time-dependent degradation of threshold voltage in AIGaN/GaN high electron mobility transistorsTime-dependent degradation of threshold voltage in AIGaN/GaN high electron mobility transistors

This paper gives a detailed analysis of the time-dependent degradation of the threshold voltage in A1GaN/GaN high electron mobility transistors （HEMTs） submitted to off-state stress. The threshold voltage shows a positive shift in the early stress, then turns to a negative shift. The negative shift of the threshold voltage seems to have a long recovery time. A model related with the balance of electron trapping and detrapping induced by shallow donors and deep acceptors is proposed to explain this degradation mode.