Investigation of the characteristics of GIDL current in 90nm CMOS technology

A specially designed experiment is performed for investigating gate-induced drain leakage (GIDL) current in 90nm CMOS technology using lightly-doped drain (LDD) NMOSFET. This paper shows that the drain bias $V_{\rm D}$ has a strong effect on GIDL current as compared with the gate bias $V_{\rm G}$ at the same drain--gate voltage $V_{\rm DG}$. It is found that the difference between $I_{\rm D}$ in the off-state $I_{\rm D}-V_{\rm G}$ characteristics and the corresponding one in the off-state $I_{\rm D}-V_{\rm D}$ characteristics, which is defined as $I_{\rm DIFF}$, versus $V_{\rm DG}$ shows a peak. The difference between the influences of $V_{\rm D}$ and $V_{\rm G}$ on GIDL current is shown quantitatively by $I_{\rm DIFF}$, especially in 90nm scale. The difference is due to different hole tunnellings. Furthermore, the maximum $I_{\rm DIFF }$($I_{\rm DIFF,MAX})$ varies linearly with $V_{\rm DG}$ in logarithmic coordinates and also $V_{\rm DG}$ at $I_{\rm DIFF,MAX}$ with $V_{\rm F}$ which is the characteristic voltage of $I_{\rm DIFF}$. The relations are studied and some related expressions are given.     

Analytical analysis of surface potential for grooved-gate MOSFET

The improvement of the characteristics of grooved-gate MOSFETs compared to the planar devices is attributed to the corner effect of the surface potential along the channel. In this paper we propose an analytical model of the surface potential distribution based on the solution of two-dimensional Poisson equation in cylindrical coordinates utilizing the cylinder approximation and the structure parameters such as the concave corner $\theta _0 $. The relationship between the minimum surface potential and the structure parameters is theoretically analysed. Results confirm that the bigger the concave corner, the more obvious the corner effect. The corner effect increases the threshold voltage of the grooved-gate MOSFETs, so the better is the short channel effect (SCE) immunity.     

Comparison of hot-hole injections in ultrashort channel LDD nMOSFETs with ultrathin oxide under an alternating stress

The behaviours of three types of hot-hole injections in ultrashort channel lightly doped drain (LDD) nMOSFETs with ultrathin oxide under an alternating stress have been compared. The three types of hot-hole injections, i.e. low gate voltage hot hole injection (LGVHHI), gate-induced drain leakage induced hot-hole injection (GIDLIHHI) and substrate hot-hole injection (SHHI), have different influences on the devices damaged already by the previous hot electron injection (HEI) because of the different locations of trapping holes and interface states induced by the three types of injections, i.e. three types of stresses. Experimental results show that GIDLIHHI and LGVHHI cannot recover the degradation of electron trapping, but SHHI can. Although SHHI can recover the device's performance, the recovery is slight and reaches saturation quickly, which is suggested here to be attributed to the fact that trapped holes are too few and the equilibrium is reached between the trapping and releasing of holes which can be set up quickly in the ultrathin oxide.     

Effect of Si doping in wells of A1GaN/GaN superlattice on the characteristics of epitaxial layer

An A1GaN/GaN superlattice grown on the top of a GaN buffer induces the broadening of the full width at half maximum of （102） and （002） X-ray diffraction rocking curves. With an increase in the Si-doped concentration in the GaN wells, the full width at half maximum of the （102） rocking curves decreases, while that of the （002） rocking curves increases. A significant increase of the full width at the half maximum of the （002） rocking curves when the doping concentration reaches 2.5 × 10^19 cm-3 indicates the substantial increase of the inclined threading dislocation. High level doping in the A1GaN/GaN superlattice can greatly reduce the biaxial stress and optimize the surface roughness of the structures grown on the top of it.     

Reverse blocking enhancement of drain field plate in Schottky-drain AlGaN/GaN high-electron mobility transistors

In this paper, we present the combination of drain field plate(FP) and Schottky drain to improve the reverse blocking capability, and investigate the reverse blocking enhancement of drain FP in Schottky-drain AlGaN/GaN high-electron mobility transistors(HEMTs). Drain FP and gate FP were employed in a two-dimensional simulation to improve the reverse blocking voltage(VRB) and the forward blocking voltage(VFB). The drain-FP length, the gate-FP length and the passivation layer thickness were optimized. VRBand VFBwere improved from-67 V and 134 V to-653 V and 868 V respectively after optimization. Simulation results suggest that the combination of drain FP and Schottky drain can enhance the reverse blocking capability significantly.     

Improved crystal quality of GaN film with the in-plane lattice-matched In_(0.17)Al_(0.83)N interlayer grown on sapphire substrate using pulsed metal organic chemical vapor deposition

We report on an improvement in the crystal quality of GaN film with an In0.17Al0.83N interlayer grown by pulsed metal–organic chemical vapor deposition, which is in-plane lattice-matched to GaN films. The indium composition of about 17% and the reductions of both screw and edge threading dislocations(TDs) in GaN film with the InAlN interlayer are estimated by high resolution X-ray diffraction. Transmission electron microscopy(TEM) measurements are employed to understand the mechanism of reduction in TD density. Raman and photoluminescence measurements indicate that the InAlN interlayer can improve the crystal quality of GaN film, and verify that there is no additional residual stress induced into the GaN film with InAlN interlayer. Atomic force microscopy measurement shows that the InAlN interlayer brings in a smooth surface morphology of GaN film. All the results show that the insertion of the InAlN interlayer is a convenient method to achieve excellent crystal quality in GaN epitaxy.     

A two-dimensional fully analytical model with polarization effect for off-state channel potential and electric field distributions of GaN-based field-plated high electron mobility transistor

In this paper, we present a two-dimensional （2D） fully analytical model with consideration of polarization effect for the channel potential and electric field distributions of the gate field-plated high electron mobility transistor （FP-HEMT） on the basis of 2D Poisson＇s solution. The dependences of the channel potential and electric field distributions on drain bias, polarization charge density, FP structure parameters, A1GaN/GaN material parameters, etc. are investigated. A simple and convenient approach to designing high breakdown voltage FP-HEMTs is also proposed. The validity of this model is demonstrated by comparison with the numerical simulations with Silvaco-Atlas. The method in this paper can be extended to the development of other analytical models for different device structures, such as MIS-HEMTs, multiple-FP HETMs, slant-FP HEMTs, etc.     

Mechanism of improving forward and reverse blocking voltages in AlGaN/GaN HEMTs by using Schottky drain

In this paper, we demonstrate that a Schottky drain can improve the forward and reverse blocking voltages(BVs)simultaneously in AlGaN/GaN high-electron mobility transistors(HEMTs). The mechanism of improving the two BVs is investigated by analysing the leakage current components and by software simulation. The forward BV increases from72 V to 149 V due to the good Schottky contact morphology. During the reverse bias, the buffer leakage in the Ohmicdrain HEMT increases significantly with the increase of the negative drain bias. For the Schottky-drain HEMT, the buffer leakage is suppressed effectively by the formation of the depletion region at the drain terminal. As a result, the reverse BV is enhanced from-5 V to-49 V by using a Schottky drain. Experiments and the simulation indicate that a Schottky drain is desirable for power electronic applications.     

SiC衬底上异质外延GaN薄膜XPS谱和PL谱研究

利用X射线光电子能谱,对在SiC衬底上采用MOCVD异质外延的未故意掺杂的GaN进行N、Ga组份测试,同时用光致发光技术对样品进行发光特性的研究.结果表明,随着GaN薄膜中Ga百分含量逐渐减小,室温下黄光输出峰值强度却逐渐增加.因此,在Ga含量相对低的GaN薄膜中容易形成Ga空位(即Ga空位浓度较高),而此时,黄光辐射强度单调递增证明,黄光辐射与VGa密切相关.     

Investigation on threshold voltage of p-channel GaN MOSFETs based on p-GaN/AlGaN/GaN heterostructure

The threshold voltage (V_th) of the p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) is investigated via Silvaco-Atlas simulations. The main factors which influence the threshold voltage of p-channel GaN MOSFETs are barrier height Φ_1,p, polarization charge density σ_b, and equivalent unite capacitance C_oc. It is found that the thinner thickness of p-GaN layer and oxide layer will acquire the more negative threshold voltage V_th, and threshold voltage |V_th| increases with the reduction in p-GaN doping concentration and the work-function of gate metal. Meanwhile, the increase in gate dielectric relative permittivity may cause the increase in threshold voltage |V_th|. Additionally, the parameter influencing output current most is the p-GaN doping concentration, and the maximum current density is 9.5 mA/mm with p-type doping concentration of 9.5×10¹⁶ cm^-3 at V_GS = -12 V and V_DS = -10 V.