A nano-scale mirror-like surface of Ti–6Al–4V attained by chemical mechanical polishing

Metal Ti and its alloys have been widely utilized in the fields of aviation, medical science, and micro-electromechanical systems, for its excellent specific strength, resistance to corrosion, and biological compatibility. As the application of Ti moves to the micro or nano scale, however, traditional methods of planarization have shown their short slabs.Thus, we introduce the method of chemical mechanical polishing(CMP) to provide a new way for the nano-scale planarization method of Ti alloys. We obtain a mirror-like surface, whose flatness is of nano-scale, via the CMP method. We test the basic mechanical behavior of Ti–6Al–4V(Ti64) in the CMP process, and optimize the composition of CMP slurry.Furthermore, the possible reactions that may take place in the CMP process have been studied by electrochemical methods combined with x-ray photoelectron spectroscopy(XPS). An equivalent circuit has been built to interpret the dynamic of oxidation. Finally, a model has been established to explain the synergy of chemical and mechanical effects in the CMP of Ti–6Al–4V.     

Enhanced Performance of Phase Change Memory Cell Element by Initial Operation and Non-Cumulative Programming

A phase change memory （PCM） device, based on the Ge2Sb2Te5 （GST） material, is fabricated using the standard 0.18-μm CMOS technology. After serials of detailed experiments on the phase transition behaviors, we find that the RESET process is strongly dependent on the state of the inactive area and the active area affects the SET process dramatically. By applying a 5-mA current-voltage （I — V） sweep as initial operation, we can reduce the voltage drop beyond the active area during the RESET process and the overall RESET voltage decreases from 3 V plus to 2.5 V. For the SET operation, a non-cumulative programming method is introduced to eliminate the impact of randomly formed amorphous active area, which is strongly related to the threshold switching process and SET voltage. Combining the two methods, the endurance performance of the PCM device has been remarkably improved beyond 1 × 106 cycles.     

Iron trichloride as oxidizer in acid slurry for chemical mechanical polishing of Ge2Sb2Te5

The effect of iron trichloride （FeC13） on chemical mechanical polishing （CMP） of Ge2Sb2Te5 （GST） film is inves- tigated in this paper. The polishing rate of GST increases from 38 nm/min to 144 nm/min when the FeC13 concentration changes from 0.01 wt% to 0.15 wt%, which is much faster than 20 nm/min for the 1 wt% H2O2-based slurry. This polish- ing rate trends are inversely correlated with the contact angle data of FeCl3-based slurry on the GST film surface. Thus, it is hypothesized that the hydrophilicity of the GST film surface is associated with the polishing rate during CMP. Atomic force microscope （AFM） and optical microscope （OM） are used to characterize the surface quality after CMP. The chemical mechanism is studied by potentiodynamic measurements such as Ecorr and Icorr to analyze chemical reaction between FeCl3 and GST surface. Finally, it is verified that slurry with FeCl3 has no influence on the electrical property of the post-CMP GST film by the resistivity-temperature （RT） tests.     

Novel material for nonvolatile ovonic unified memory (OUM)－Ag11In12Te26Sb51 phase change semiconductor

In this paper, Ag_{11}In_{12}Te_{26}Sb_{51} phase change semiconductor films have been prepared by dc sputtering. The crystallization behaviour of amorphous Ag_{11}In_{12}Te_{26}Sb_{51} thin films was investigated by using differential scanning calorimetry and x-ray diffraction. It was found that the crystallization temperature is about 483K and the melting temperature is 754.8K and the activation energy for crystallization, E_a, is 2.07eV. The crystalline Ag_{11}In_{12}Te_{26}Sb_{51} films were obtained using initializer. The initialization conditions have a great effect on the sheet resistance of Ag_{11}In_{12}Te_{26}Sb_{51} films. We found that the effect of the initialization condition on the sheet resistance can be ascribed to the crystallinity of Ag_{11}In_{12}Te_{26}Sb_{51} films. The sheet resistance of the amorphous (R_{amo}) film is found to be larger than 1×10^6Ω and that of the crystalline (R_{cry}) film lies in the range from about 10^3 to 10^4Ω. So we have the ratio R_{amo}/R_{cry}=10^2～10^3, which is sufficiently large for application in memory devices.     

Three-Dimensional Finite Element Analysis of Phase Change Memory Cell with Thin TiO2 Film

A thin TiO2 layer inserted in a phase change memory （PCM） cell to form a deep sub-micro bottom electrode （DBE） is proposed and its electro-thermal characteristics are investigated with the three-dimensional finite element analysis. Compared with the conventional PCM cell with a SiN stop layer, the reset threshold current of the PCM cell with the TiO2 layer is reduced from 1.8 mA to 1.2 mA and the ratio of the amorphous resistance and crystalline resistive increases from 65 to 100. The optimum thickness of the TiO2 layer and the optimum height of DBE are 10nm and 200nm, respectively. Therefore, the PCM cell with the TiO2 layer can decrease the programming power consumption and increase heating efficiency. The TiO2 film is a better candidate for the SiN film in the PCM cell structure to prepare DBE and to reduce programming power in the reset operation.     

Polydisperse spherical colloidal silica particles:Preparation and application

A new industrial method has been developed to produce polydisperse spherical colloidal silica particles with a very broad particle size,ranging from 20-95 nm.The process uses a reactor in which the original seed solution is heated to 100 ℃,and then active silicic acid and the seed solution are titrated to the reactor continuously with a constant rate.The original seeds and the titrated seeds in the reactor will go through different particle growth cycles to form different particle sizes.Both the particles' size distribution and morphology have been characterized by dynamic light scattering(DLS)and the focus ion beam(FIB) system.In addition,the as-prepared polydisperse colloidal silica particle in the application of sapphire wafer's chemical mechanical polishing(CMP) process has been tested.The material removal rate(MRR) of this kind of abrasive has been tested and verified to be much faster than traditional monodisperse silica particles.Finally,the mechanism of sapphire CMP process by this kind of polydisperse silica particles has been investigated to explore the reasons for the high polishing rate.     

Growth of High Quality Strained-Si on Ultra-Thin SiGe-on-Insulator Substrate

Ultra-thin and near-fully relaxed SiCe substrate is fabricated using a modified Ce condensation technique, and then a 25-nm-thiek biaxially tensile strained-Si with a low rms roughness is epitaxially deposited on a SiGe- on-Insulator （SGOI） substrate by ultra high vacuum chemical vapor deposition （UHVCVD）. High-Resolution cross-sectional transmission electron microscope （HR-XTEM） observations reveal that the strained-Si/SiGe layer is dislocation-free and the atoms at the interface are well aligned. Furthermore, secondary ion mass spectrometry （SIMS） results show a sharp interface between layers and a uniform distribution of Ge in the SiCe layer. One percent in-plane tensile strain in the strained-Si layer is confirmed by ultraviolet （UV） Raman spectra, and the stress maintained even after a 30-s rapid thermal annealing （RTA） process at 1000℃. According to those results, devices based on strained-Si are expected to have a better performance than the conventional ones.     

Investigation of SOI Substrates Incorporated with Buried MoSi2 for High Frequency SiGe HBTs

Highly arsenic-doped Si-on-insulator （SOI） substrate incorporated with buried MoSi2 layers is fabricated aiming at decreasing the collector series resistance of SiGe heterojunction bipolar transistors （HBTs） on SOI, thereby enhancing cutoff frequency （fT） performance and increasing the maximum value of fT （fTMAX ）. The .fT performance at medium current is enhanced and current required for fT = 15 GHz is reduced by half The value of fTMAX is improved by 30%.     

Ge1Sb2Te4 Based Chalcogenide Random Access Memory Array Fabricated by 0.18-μm CMOS Technology

Ge1Sb2Te4-based chalcogenide random access memory array, with a tungsten heating electrode of 260hm in diameter, is fabricated by 0.18-μm CMOS technology. Electrical performance of the device, as web as physical and electrical properties of GelSb2 Te4 thin film, is characterized. SET and RESET programming currents are 1.6 and 4.1 mA, respectively, when pulse width is 100 ns. Both the values are larger than those of the Ge2Sb2 Tesbased ones with the same structure and contact size. Endurance up to 106 cycles with a resistance ratio of about 100 has been achieved.     

Universal memory based on phase-change materials: From phase-change random access memory to optoelectronic hybrid storage

The era of information explosion is coming and information need to be continuously stored and randomly accessed over long-term periods, which constitute an insurmountable challenge for existing data centers. At present, computing devices use the von Neumann architecture with separate computing and memory units, which exposes the shortcomings of “memory bottleneck”. Nonvolatile memristor can realize data storage and in-memory computing at the same time and promises to overcome this bottleneck. Phase-change random access memory (PCRAM) is called one of the best solutions for next generation non-volatile memory. Due to its high speed, good data retention, high density, low power consumption, PCRAM has the broad commercial prospects in the in-memory computing application. In this review, the research progress of phase-change materials and device structures for PCRAM, as well as the most critical performances for a universal memory, such as speed, capacity, and power consumption, are reviewed. By comparing the advantages and disadvantages of phase-change optical disk and PCRAM, a new concept of optoelectronic hybrid storage based on phase-change material is proposed. Furthermore, its feasibility to replace existing memory technologies as a universal memory is also discussed as well.