Effect of substrate doping on the flatband and threshold voltages of strained-Si pMOSFET

The effect of substrate doping on the flatband and threshold voltages of strained-Si/SiGe p metal-oxide semiconductor field-effect transistor (pMOSFET) has been studied. By physically deriving the models of the flatband and threshold voltages, which have been validated by numerical simulation and experimental data, the shift in the plateau from the inversion region to the accumulation region as the substrate doping increases has been explained. The proposed model can provide valuable reference to the designers of strained-Si devices and has been implemented in software for extracting the parameters of strained-Si MOSFET.     

应变Si NMOS积累区电容特性研究

积累区MOS电容线性度高且不受频率限制, 具有反型区MOS电容不可比拟的优势. 本文在研究应变Si NMOS电容C-V特性中台阶效应形成机理的基础上, 通过求解电荷分布, 建立了应变Si/SiGe NMOS积累区电容模型, 并与实验结果进行了对比, 验证了模型的正确性. 最后, 基于该模型, 研究了锗组分、应变层厚度、掺杂浓度等参数对台阶效应的影响, 为应变Si器件的制造提供了重要的指导作用. 本模型已成功用于硅基应变器件模型参数提取软件中, 为器件仿真奠定了理论基础. 关键词： 应变Si NMOS 积累区电容 台阶效应 电荷分布     

应变Si n型金属氧化物半导体场效应晶体管电荷模型

基于应变Si/SiGe器件结构,本文建立了统一的应变Si NMOSFET电荷模型.该模型采用电荷作为状态变量,解决了电荷守恒问题.同时采用平滑函数,实现了应变Si NMOSFET端口电荷及其电容,从亚阈值区到强反型区以及从线性区到饱和区的平滑性,解决了模型的连续性问题.然后采用模拟硬件描述语言Verilog-A建立了电容模型.通过将模型的仿真结果和实验结果对比分析,验证了所建模型的有效性.该模型可为应变Si集成电路分析、设计提供重要参考.     

The effect of substrate doping on the flatband and threshold voltages of a strained-Si pMOSFET

The effect of substrate doping on the flatband and threshold voltages of a strained-Si/SiGe p metal-oxide semiconductor field-effect transistor(pMOSFET) has been studied.By physically deriving the models of the flatband and threshold voltages,which have been validated by numerical simulation and experimental data,the shift in the plateau from the inversion region to the accumulation region as the substrate doping increases has been explained.The proposed model can provide a valuable reference to the designers of strained-Si devices and has been implemented in software for extracting the parameters of a strained-Si MOSFET.     

Two-dimensional threshold voltage model of nanoscale silicon-on-insulator tunneling field-effect transistor

The tunneling field-effect transistor (TFET) is a potential candidate for the post-CMOS era. In this paper, a threshold voltage model is developed for this new kind of device. First, two-dimensional (2D) models are used to describe the distributions of potential and electric field in the channel and two depletion regions. Then based on the physical definition of threshold voltage for the nanoscale TFET, the threshold voltage model is developed. The accuracy of the proposed model is verified by comparing the calculated results with the 2D device simulation data. It has been demonstrated that the effects of varying the device parameters can easily be investigated using the model presented in this paper. This threshold voltage model provides a valuable reference to the TFET device design, simulation, and fabrication.