Alternating-direction implicit (ADI) formulation of the finite-difference time-domain (FDTD) method: algorithm and material dispersion implementation

The alternating-direction implicit finite-difference time-domain (ADI-FDTD) technique is an unconditionally stable time-domain numerical scheme, allowing the /spl Delta/t time step to be increased beyond the Courant-Friedrichs-Lewy limit. Execution time of a simulation is inversely proportional to /spl Delta/t, and as such, increasing /spl Delta/t results in a decrease of execution time. The ADI-FDTD technique greatly increases the utility of the FDTD technique for electromagnetic compatibility problems. Once the basics of the ADI-FDTD technique are presented and the differences of the relative accuracy of ADI-FDTD and standard FDTD are discussed, the problems that benefit greatly from ADI-FDTD are described. A discussion is given on the true time savings of applying the ADI-FDTD technique. The feasibility of using higher order spatial and temporal techniques with ADI-FDTD is presented. The incorporation of frequency dependent material properties (material dispersion) into ADI-FDTD is also presented. The material dispersion scheme is implemented into a one-dimensional and three-dimensional problem space. The scheme is shown to be both accurate and unconditionally stable.     

Supermodularity and subadditivity properties of the entropy on themajorization lattice

We prove that the entropy is a supermodular and subadditive function on the lattice of all n-dimensional probability distributions, ordered according to the partial order relation defined by majorization among vectors     

Design and performance evaluation of a banyan network basedinterconnection structure for ATM switches

This paper presents a new self-routing packet network called the plane interconnected parallel network (PIPN). In the proposed design, the traffic arriving at the network is shaped and routed through two banyan network based interconnected planes. The interconnections between the planes distribute the incoming load more homogeneously over the network. The throughput of the network under uniform and heterogeneous traffic requirements is studied analytically and by simulation. The results are compared with the results of the baseline network and another banyan network based parallel interconnection network. It is shown that, for the proposed design, a higher degree of heterogeneity results in better performance     

Brennstoffzellen

For two applications of fuel cells (SOFC and IMFC) system configurations and energy balances are presented. A decentralized combined heat and power plant on SOFC basis can be designed as a flexible system with high efficiency. A drive system with methanol reformer and fuel cell (IMFC) in comparison with a natural gas combustion engine has lower energy comsumption and much lower emissions.     

Systematic characterization of Cl2 reactive ion etchingfor improved ohmics in AlGaN/GaN HEMTs

Pre-metal-deposition reactive ion etching (RIE) was performed on an Al_0.3Ga_0.7N/AlN/GaN heterostructure in order to improve the metal-to-semiconductor contact resistance. An optimum AlGaN thickness for minimizing contact resistance was determined. An initial decrease in contact resistance with etching time was explained in terms of removal of an oxide surface layer and/or by an increase in tunnelling current with the decrease of the AlGaN thickness. The presence of a dissimilar surface layer was confirmed by an initial nonuniform etch depth rate. An increase in contact resistance for deeper etches was experienced. The increase was related to depletion of the two-dimensional (2-D) electron gas (2-DEG) under the ohmics. Etch depths were measured by atomic force microscopy (AFM). The contact resistance decreased from about 0.45 Ωmm for unetched ohmics to a minimum of 0.27 Ωmm for 70 Å etched ohmics. The initial thickness of the AlGaN layer was 250 Å. The decrease in contact resistance, without excessive complications on device processing, supports RIE etching as a viable solution to improve ohmic contact resistance in AlGaN/GaN HEMTs     

Low-Power VLSI Implementation of the Inner Receiver for OFDM-Based WLAN Systems

In this paper, we propose low-power designs for the synchronizer and channel estimator units of the Inner Receiver in wireless local area network systems. The objective of the work is the optimization, with respect to power, area, and latency, of both the signal processing algorithms themselves and their implementation. Novel circuit design strategies have been employed to realize optimal hardware and power efficient architectures for the fast Fourier transform, arc tangent computation unit, numerically controlled oscillator, and the decimation filters. The use of multiple clock domains and clock gating reduces the power consumption further. These blocks have been integrated into an experimental digital baseband processor for the IEEE 802.11a standard implemented in the 0.25mum- 5-metal layer BiCMOS technology from Institute for High Performance Microelectronics.     

Surface-field induced interband tunneling in InAs

Metal/insulator/semiconductor junctions are prepared on degeneratep-type InAs substrates with hole concentrations ranging from 2.3×10¹⁷ cm^–3 to 2.7×10¹⁸ cm^–3. The low work function of the top metal Yb, Al, or Au and charged interface states influence a two-dimensional (2D) electron inversion layer at the InAs surface. The insulator barrier that is formed by thermal oxidation is designed sufficiently thin, so that the bias voltage applied at the metal electrode mainly drops across the depletion layer separating the electron channel from the bulk. The current-voltage (I–V) characteristics exhibit strong negative differential conductance due to interband, tunneling from the 2D subband into the 3D valence band with peak-to-valley current ratios up to 3.1, 18, and 32 at 300 K, 77 K, and 4.2 K, respectively. In agreement with a theoretical model based on coherentelastic tunneling, the form of the I–V curves resembles those of double-barrier resonant tunnel devices rather than those of 3D Esaki diodes. The series resistance is obtained from the saturation of the differential conductance dI/dV at high forward bias and from the shift of structures in d² I/dV ² arising from phonon assisted tunneling.Dedicated to G. Lautz on the occasion of his 65th birthday     

A Simulation Study of Clock Recovery in QPSK and 9QPRS Systems

Computer simulation is employed to assess jitter performance of a clock recovery circuit as a function of the characteristics of the rectifier being used. Several types of rectifiers are compared, some operating at baseband, others at intermediate frequency (IF). It is shown that the best choice between them depends both on the modulation format and on the excess bandwidth factor of the pulse spectrum. In QPSK systems, fourth-law rectifiers outperform the others for rolloff factors up to 0.2 while, for higher values, baseband absolutevalue rectifiers are preferable. In the case of 9QPRS, baseband absolutevalue rectifiers provide jitter reductions of one order of magnitude at high signal-to-noise ratios.