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1.
We present PowerNap, an OS power management scheme, which can significantly improve the battery life of mobile devices. The key feature of PowerNap is the skipping of the periodic system timer ticks associated with the operating system. On an idle device, this modification increases the time between successive timer interrupts and enables us to put the processor/system into a more efficient low power state. This saves the energy consumed by workless timer interrupts and the excess energy consumed by the processor in less efficient low power states. PowerNap is tightly integrated with the kernel and is designed for optimal control of the latency and energy associated with transitioning in and out of the low power states. We describe an implementation of PowerNap and its impact on system software. Experiments with IBM's WatchPad verify the ability of PowerNap to extend battery life. An analytical model that quantifies the ability of the scheme to reduce power is also presented. The model is in good agreement with experimental results. We apply the model to small form-factor devices which use processors that have a PowerDown state. In such devices, PowerNap may extend battery life by more than 42 percent for small processor workloads and for background power levels below 10 mW.  相似文献   
2.
3.
The authors present an experimental real-time GSM terminal detector, to be installed in a restricted area. The detector triggers terminal signaling, which can be captured.  相似文献   
4.
In this brief, the well-known switched-current (SI) filtering technique is revisited using the concept of the square-root domain (SRD) filtering. It is proved that SI filters are a subclass of the SRD filters, where sampled-data signal processing is performed. This is achieved by considering typical lossless and lossy SRD sampled-data integrator configurations, using a set of complementary SRD operators which are based on the quadratic I-V relationship of MOS transistor operated in the saturation. Circuit examples are given, where linear-domain integrator and third-order filter configurations were derived using appropriate SRD sampled-data building blocks  相似文献   
5.
Many cables containing 1.3-/spl mu/m zero-dispersion single-mode (SM) optical fibers are installed in trunk and access networks. Recently, there have been a number of studies on wavelength-division-multiplexing (WDM) systems designed to increase transmission capacity and flexibility. If we can construct WDM systems using SM optical-fiber cable networks designed to transmit using wavelengths in the 1.3-/spl mu/m window (O-band), this will prove very effective in reducing construction costs. It is therefore important to examine the wavelength dependence of the transmission characteristics of SM optical-fiber cables and networks that have already been installed and in which several optical fibers are joined. In this paper, we describe the measured optical characteristics of SM optical-fiber cables and installed optical-fiber cable networks at various wavelengths. The optical characteristics were stable in the 1.46 to 1.625-/spl mu/m wavelength range and we confirmed that the installed SM optical-fiber cable networks could be used for WDM system applications.  相似文献   
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7.
For the first time, we successfully fabricated and demonstrated high performance metal-insulator-metal (MIM) capacitors with HfO/sub 2/-Al/sub 2/O/sub 3/ laminate dielectric using atomic layer deposition (ALD) technique. Our data indicates that the laminate MIM capacitor can provide high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz up to 20 GHz, very low leakage current of 3.2 /spl times/ 10/sup -8/ A/cm/sup 2/ at 3.3 V, small linear voltage coefficient of capacitance of 240 ppm/V together with quadratic one of 1830 ppm/V/sup 2/, temperature coefficient of capacitance of 182 ppm//spl deg/C, and high breakdown field of /spl sim/6 MV/cm as well as promising reliability. As a result, the HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising candidate for next generation MIM capacitor for radio frequency and mixed signal integrated circuit applications.  相似文献   
8.
First-order polarization-mode dispersion (PMD) compensation by means of a polarization controller and a differential delay line is not sufficient to guarantee error-free transmission for 40-Gb/s channels when higher order effects severely increase signal distortion. Higher order mitigation is possible by cascading more than one first-order block. However, only two-stage or three-stage devices remain simple enough to be actually controlled. The performance of such higher order PMD compensators is evaluated by means of numerical simulations. Two different feedback signals have been used, demonstrating that first-order and higher order PMD distortion of nonreturn-to-zero (NRZ) pulses at 40 Gb/s can be strongly mitigated for instantaneous values of the differential group delay (DGD) up to the bit slot, when the compensator is properly controlled.  相似文献   
9.
This paper addresses the problem of power control in a multihop wireless network supporting multicast traffic. We face the problem of forwarding packet traffic to multicast group members while meeting constraints on the signal-to-interference-plus-noise ratio (SINR) at the intended receivers. First, we present a distributed algorithm which, given the set of multicast senders and their corresponding receivers, provides an optimal solution when it exists, which minimizes the total transmit power. When no optimal solution can be found for the given set of multicast senders and receivers, we introduce a distributed, joint scheduling and power control algorithm which eliminates the weak connections and tries to maximize the number of successful multicast transmissions. The algorithm allows the other senders to solve the power control problem and minimize the total transmit power. We show that our distributed algorithm converges to the optimal solution when it exists, and performs close to centralized, heuristic algorithms that have been proposed to address the joint scheduling and power control problem.  相似文献   
10.
Analogue switch for very low-voltage applications   总被引:2,自引:0,他引:2  
A new analogue switch suitable for operation at very low-voltage supply in a standard CMOS technology is presented. The proposed switch is based on 'quasi-floating-gate' transistors and has a simple and compact structure. For illustrative purposes, two sample-and-hold circuits operating from a single supply voltage close to the threshold voltage of a transistor, and using the proposed technique, are presented. Experimental results obtained from prototypes in a 1.5 /spl mu/m CMOS technology are provided.  相似文献   
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