共查询到20条相似文献,搜索用时 203 毫秒
1.
对超深亚微米PMOS器件的负栅压温度不稳定性(NBTI)退化机理进行了研究.主要集中在对器件施加NBT和随后的PBT应力后器件阈值电压的漂移上.实验证明反型沟道中空穴在栅氧中的俘获以及氢分子在栅氧中的扩散是引起NBTI退化的主要原因.当应力条件变为PBT时,陷落的空穴可以快速退陷,但只有部分氢分子可以扩散回栅氧与衬底界面钝化硅悬挂键,这就导致了PBT条件下阈值电压只能部分恢复.
关键词:
超深亚微米PMOS器件
负偏压温度不稳定性
界面陷阱
氢气 相似文献
2.
This paper studies negative bias temperature instability (NBTI) under alternant and alternating current (AC) stress.Under alternant stress,the degradation smaller than that of single negative stress is obtained.The smaller degradation is resulted from the recovery of positive stress.There are two reasons for the recovery.One is the passivation of H dangling bonds,and another is the detrapping of charges trapped in the oxide.Under different frequencies of AC stress,the parameters all show regular degradation,and also smaller than that of the direct current stress.The higher the frequency is,the smaller the degradation becomes.As the negative stress time is too small under higher frequency,the deeper defects are hard to be filled in.Therefore,the detrapping of oxide charges is easy to occur under positive bias and the degradation is smaller with higher frequency. 相似文献
3.
Dependence of short channel length on negative/positive bias temperature instability (NBTI/PBTI) for 3D FinFET devices 下载免费PDF全文
A comprehensive study of the negative and positive bias temperature instability(NBTI/PBTI)of 3D FinFET devices with different small channel lengths is presented.It is found while with the channel lengths shrinking from 100 nm to 30 nm,both the NBTI characteristics of p-FinFET and PBTI characteristics of n-FinFET turn better.Moreover,the channel length dependence on NBTI is more serious than that on PBTI.Through the analysis of the physical mechanism of BTI and the simulation of 3-D stress in the FinFET device,a physical mechanism of the channel length dependence on NBTI/PBTI is proposed.Both extra fluorine passivation in the corner of bulk oxide and stronger channel stress in p-FinFETs with shorter channel length causes less NBTI issue,while the extra nitrogen passivation in the corner of bulk oxide induces less PBTI degradation as the channel length decreasing for n-FinFETs.The mechanism well matches the experimental result and provides one helpful guide for the improvement of reliability issues in the advanced FinFET process. 相似文献
4.
Recovery phenomenon is observed under negative gate voltage stress which is smaller than the previous degradation stress. We focus on the drain current to study the degradation and recovery of negative bias temperature instability (NBTI) with a real-time method. By this method, different recovery phenomena among different size devices are observed. Under negative recovery stress, the drain current gradually recovers for the large size devices and gets into recovery saturation when long recovery time is involved. For small-size devices, a step-like recovery of drain current is observed. The recovery of the drain current is mainly caused by the holes detrapping and tunnelling back to the channel surface which are trapped in oxide. The model of hole detrapping explains the recovery under negative voltage stress reasonably. 相似文献
5.
Negative bias temperature instability (NBTI) and stress-induced leakage current (SILC) both are more serious due to the aggressive scaling lowering of devices. We investigate the SILC during NBTI stress in PMOSFETs with ultra-thin gate dielectrics. The SILC sensed range from -1 V to 1 V is divided into four parts: the on-state SILC, the near-zero SILC, the off-state SILC sensed at lower positive voltages and the one sensed at higher positive voltages. We develop a model of tunnelling assisted by interface states and oxide bulk traps to explain the four different parts of SILC during NBTI stress. 相似文献
6.
Evaluation of negative bias temperature instability in ultra-thin gate oxide pMOSFETs using a new on-line PDO method 下载免费PDF全文
A new on-line methodology is used to characterize the negative bias temperature
instability (NBTI) without inherent recovery. Saturation drain voltage shift and
mobility shift are extracted by ID-VD characterizations, which were
measured before stress, and after every certain stress phase, using the
proportional differential operator (PDO) method. The new on-line methodology avoids
the mobility linearity assumption as compared with the previous on-the-fly method.
It is found that both reaction--diffusion and charge-injection processes are
important in NBTI effect under either DC or AC stress. A similar activation energy,
0.15 eV, occurred in both DC and AC NBTI processes. Also degradation rate factor is
independent of temperature below 90\du\ and sharply increases above it. The
frequency dependence of NBTI degradation shows that NBTI degradation is independent
of frequencies. The carrier tunnelling and reaction--diffusion mechanisms exist
simultaneously in NBTI degradation of sub-micron pMOSFETs, and the carrier
tunnelling dominates the earlier NBTI stage and the reaction--diffusion mechanism
follows when the generation rate of traps caused by carrier tunnelling reaches its
maximum. 相似文献
7.
The impact of negative bias temperature instability(NBTI) can be ascribed to three mutually uncorrelated factors, including hole trapping by pre-existing traps(?V_(HT)) in gate insulator, generated traps(?V_(OT)) in bulk insulator, and interface trap generation(?V_(IT)). In this paper, we have experimentally investigated the NBTI characteristic for a 40-nm complementary metal–oxide semiconductor(CMOS) process. The power-law time dependence, temperature activation, and field acceleration have also been explored based on the physical reaction–diffusion model. Moreover, the end-of-life of stressed device dependent on the variation of stress field and temperature have been evaluated. With the consideration of locking effect, the recovery characteristics have been modelled and discussed. 相似文献
8.
制备了基于反应溅射SiOx绝缘层的InGaZnO-TFT,并系统地研究了InGaZnO-TFT在白光照射下的稳定性,主要涉及到光照、负偏压、正偏压、光照负偏压和光照正偏压5种情况。结果表明,器件在光照和负偏压光照下的阈值偏移较大,而在正偏压光照情况下的阈值偏移几乎可以忽略。采用C-V方法证明阈值电压漂移是源于绝缘层/有源层附近及界面处的缺陷。另外,采用指数模式计算了缺陷态的弛豫时间。本研究的目的就是揭示InGaZnO-TFT在白光照射和偏压下的不稳定的原因。 相似文献
9.
Effect of substrate bias on negative bias temperature instability of ultra-deep sub-micro p-channel metal--oxide--semiconductor field-effect transistors 下载免费PDF全文
The effect of substrate bias on the degradation during applying a
negative bias temperature (NBT) stress is studied in this paper.
With a smaller gate voltage stress applied, the degradation of
negative bias temperature instability (NBTI) is enhanced, and there
comes forth an inflexion point. The degradation pace turns larger
when the substrate bias is higher than the inflexion point. The
substrate hot holes can be injected into oxide and generate
additional oxide traps, inducing an inflexion phenomenon. When a
constant substrate bias stress is applied, as the gate voltage
stress increases, an inflexion comes into being also. The higher
gate voltage causes the electrons to tunnel into the substrate from
the poly, thereby generating the electron--hole pairs by impact
ionization. The holes generated by impact ionization and the holes
from the substrate all can be accelerated to high energies by the
substrate bias. More additional oxide traps can be produced, and
correspondingly, the degradation is strengthened by the substrate
bias. The results of the alternate stress experiment show that the
interface traps generated by the hot holes cannot be annealed, which
is different from those generated by common holes. 相似文献
10.
《Current Applied Physics》2015,15(6):675-678
Penetration effects of various electrode materials, namely Al, Au, and Cu, on the physical and electrical characteristics of amorphous oxide semiconductor thin film transistors (TFTs) were investigated. Amorphous indium gallium zinc oxide (a-IGZO) TFTs were fabricated with conventional staggered bottom gate structures on a p-type Si substrate. X-ray photoemission spectroscopy (XPS) analysis under the electrode deposition area revealed variations in the oxygen bonding states and material compositions of the a-IGZO layer. Field-emission scanning electron microscopy (FE-SEM) with the line scan of energy dispersive spectroscopy (EDS) showed lateral penetration by the electrode metal. To compare the electrical characteristics of the tested TFTs, the initial current–voltage (I–V) transfer characteristics were examined. In addition, the tested TFTs fabricated using various electrode materials were tested under bias stress to verify the correlations between variations in TFT characteristics and both the metal work function and penetration-induced oxygen vacancies in the channel around the contact area. 相似文献
11.
Study on the drain bias effect on negative bias temperature instability degradation of an ultra-short p-channel metal-oxide-semiconductor field-effect transistor 下载免费PDF全文
This paper studies the effect of drain bias on
ultra-short p-channel metal-oxide-semiconductor field-effect
transistor (PMOSFET) degradation during negative bias temperature
(NBT) stress. When a relatively large gate voltage is applied, the
degradation magnitude is much more than the drain voltage which is
the same as the gate voltage supplied, and the time exponent gets
larger than that of the NBT instability (NBTI). With decreasing
drain voltage, the degradation magnitude and the time exponent all
get smaller. At some values of the drain voltage, the degradation
magnitude is even smaller than that of NBTI, and when the drain
voltage gets small enough, the exhibition of degradation becomes
very similar to the NBTI degradation. When a relatively large drain
voltage is applied, with decreasing gate voltage, the
degradation magnitude gets smaller. However, the time exponent
becomes larger. With the help of electric field simulation, this
paper concludes that the degradation magnitude is determined by the
vertical electric field of the oxide, the amount of hot holes
generated by the strong channel lateral electric field at the
gate/drain overlap region, and the time exponent is mainly
controlled by localized damage caused by the lateral electric
field of the oxide in the gate/drain overlap region where hot carriers
are produced. 相似文献
12.
Degradation characteristics of PMOSFETs under negative bias
temperature--positive bias temperature--negative bias temperature
(NBT--PBT--NBT) stress conditions are investigated in this paper. It
is found that for all device parameters, the threshold voltage has
the largest shift under the first NBT stress condition. When the
polarity of gate voltage is changed to positive, the shift of device
parameters can be greatly recovered. However, this recovery is
unstable. The more severe degradation appears soon after
reapplication of NBT stress condition. The second NBT stress causes
in linear drain current to degrade greatly, which is different from
that of the first NBT stress. This more severe parameter shift
results from the wear out of silicon substrate and oxide interface
during the first NBT and PBT stress due to carrier
trapping/detrapping and hydrogen related species diffusion. 相似文献
13.
14.
对65 nm互补金属氧化物半导体工艺下不同尺寸的N型和P型金属氧化物半导体场效应晶体管(NMOSFET和PMOSFET)开展了不同偏置条件下电离总剂量辐照实验.结果表明:PMOSFET的电离辐射响应与器件结构和偏置条件均有很强的依赖性,而NMOSFET表现出较强的抗总剂量性能;在累积相同总剂量时,PMOSFET的辐照损伤远大于NMOSFET.结合理论分析和数值模拟给出了PMOSFET的辐射敏感位置及辐射损伤的物理机制. 相似文献
15.
The NBTI degradation phenomenon and the role of hydrogen during NBT stress
are presented in this paper. It is found that PBT stress can recover a
fraction of Vth shift induced by NBTI. However, this recovery is
unstable. The original degradation reappears soon after reapplication of the NBT
stress condition. Hydrogen-related species play a key role during a device's NBT
degradation. Experimental results show that the diffusion species are
neutral, they repassivate Si dangling bond which is independent of the gate
voltage polarity. In addition to the diffusion towards gate oxide, hydrogen
diffusion to Si-substrate must be taken into account for it also has
important influence on device degradation during NBT stress. 相似文献
16.
Study on the degradation of NMOSFETs with ultra-thin gate oxide under channel hot electron stress at high temperature 下载免费PDF全文
This paper studies the degradation of device parameters
and that of stress induced leakage current (SILC) of thin tunnel
gate oxide under channel hot electron (CHE) stress at high
temperature by using n-channel metal oxide semiconductor field
effect transistors (NMOSFETs) with 1.4-nm gate oxides. The
degradation of device parameters under CHE stress exhibits
saturating time dependence at high temperature. The emphasis of this
paper is on SILC of an ultra-thin-gate-oxide under CHE stress at high
temperature. Based on the experimental results, it is found that
there is a linear correlation between SILC degradation and Vh
degradation in NMOSFETs during CHE stress. A model of
the combined effect of oxide trapped negative charges and interface
traps is developed to explain the origin of SILC during CHE stress. 相似文献
17.
研究了HfN/HfO2高K栅结构p型金属-氧化物-半导体(MOS)晶体管(MOSFET)中,负 偏置-温度应力引起的阈值电压不稳定性(NBTI)特征.HfN/HfO2高K栅结构的等效 氧化层厚度(EOT)为1.3nm,内含原生缺陷密度较低.研究表明,由于所制备的HfN/HfO2 高K栅结构具有低的原生缺陷密度,因此在p-MOSFET器件中观察到的NBTI属HfN/HfO2高K栅结构的本征特征,而非工艺缺陷引起的;进一步研究表明,该HfN/HfO2高K栅结构中观察到的NBTI与传统的SiO2基栅介质p-MOSFET器件中观察 到的NBTI具有类似的特征,可以被所谓的反应-扩散(R-D)模型表征: HfN/HfO2 栅结构p-MOSFET器件的NBTI效应的起源可以归为衬底注入空穴诱导的界面反应机理,即在负 偏置和温度应力作用下,从Si衬底注入的空穴诱导了Si衬底界面Si-H键断裂这一化学反应的 发生,并由此产生了Si+陷阱在Si衬底界面的积累和H原子在介质层内部的扩散 ,这种Si+陷阱的界面积累和H原子的扩散导致了器件NBTI效应的发生.
关键词:
高K栅介质
负偏置-温度不稳定性(NBTI)
反应-扩散(R-D)模型 相似文献
18.
Actions of negative bias temperature instability (NBTI) and hot carriers in ultra-deep submicron p-channel metal——oxide——semiconductor field-effect transistors (PMOSFETs) 下载免费PDF全文
Hot carrier injection (HCI) at high temperatures and different
values of gate bias Vg has been performed in order to study
the actions of negative bias temperature instability (NBTI) and hot
carriers. Hot-carrier-stress-induced damage at Vg=Vd, where Vd is the voltage of the transistor drain,
increases as temperature rises, contrary to conventional hot carrier
behaviour, which is identified as being related to the NBTI. A
comparison between the actions of NBTI and hot carriers at low and
high gate voltages shows that the damage behaviours are quite
different: the low gate voltage stress results in an increase in
transconductance, while the NBTI-dominated high gate voltage and
high temperature stress causes a decrease in transconductance. It is
concluded that this can be a major source of hot carrier damage at
elevated temperatures and high gate voltage stressing of p-channel
metal--oxide--semiconductor field-effect transistors (PMOSFETs). We
demonstrate a novel mode of NBTI-enhanced hot carrier degradation in
PMOSFETs. A novel method to decouple the actions of NBTI from that
of hot carriers is also presented. 相似文献
19.
Degradation and its fast recovery in a-IGZO thin-film transistors under negative gate bias stress 下载免费PDF全文
Jianing Guo 《中国物理 B》2021,30(11):118102-118102
A new type of degradation phenomena featured with increased subthreshold swing and threshold voltage after negative gate bias stress (NBS) is observed for amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs), which can recover in a short time. After comparing with the degradation phenomena under negative bias illumination stress (NBIS), positive bias stress (PBS), and positive bias illumination stress (PBIS), degradation mechanisms under NBS is proposed to be the generation of singly charged oxygen vacancies ($V_{\mathrm{o}}^{+}$) in addition to the commonly reported doubly charged oxygen vacancies ($V_{\mathrm{o}}^{2+}$). Furthermore, the NBS degradation phenomena can only be observed when the transfer curves after NBS are measured from the negative gate bias to the positive gate bias direction due to the fast recovery of $V_{\mathrm{o}}^{+}$ under positive gate bias. The proposed degradation mechanisms are verified by TCAD simulation. 相似文献