The importance of the non-quasi-static bipolar transistor model forcircuit applications

The need for non-quasi-static bipolar models is examined from a practical viewpoint in order to optimize compensation capacitor value, improve performance, and reduce chip area. This need depends on the circuit under study. The utility of non-quasi-static equivalent circuits in small-signal applications is investigated. The circuit example studied is a lateral p-n-p transistor used as a series pass transistor in a series voltage regulator. For the series voltage regulator, the non-quasi-static inductance model correctly predicts the rapid falloff of the magnitude of the current gain and thus reduces the required internal compensation and subsequent circuit area     

Concise transient SPICE model for bipolar power transistor quasi-saturation simulation

A concise transient SPICE model is presented in this paper to predict both the static and the switching behaviour of power transistors, with emphasis placed on quasi-saturation effects. The model is proposed to simulate both ohmic and non-ohmic quasi-saturation phenomena by automatically adjusting the hole injection ratio term. The model incorporates the currently used Gummel-Poon (GP) model and an additional charge-control relation for the transistor's epitaxial collector. The turn-off charge removal phenomenon is not modelled specifically; however, the charge-control equation for the epitaxial collector region may partly simulate this effect where the quasi-saturation region is entered. The validity of the model is verified by comparison between the original SPICE bipolar junction transistor model and experimental data for both DC and turn-on conditions. Methods for determining the model parameters are described.     

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part I: model formulation

A compact bipolar transistor model is presented that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM and at the same time, from a computational point of view, suitable for simulating large circuits. The new model has been implemented in Verilog-A and, as compiled code, in various commercial circuit simulators. In Part I, the fundamental model formulation is presented along with a derivation of the most important equations. Experimental results are shown in Part II.     

PCIM: a physically based continuous short-channel IGFET model forcircuit simulation

We present an accurate analytical IGFET model (PCIM), for short-channel devices down to sub-half micron channel lengths. The model is described by a single drain current equation, valid for both weak and strong inversion regions of device operation. The model contains a new velocity-field (υ-ε) relation for carriers in the channel region. Combining this relation with the channel length modulation expression, obtained using engineering approximations to the two-dimensional fields near the drain end in saturation, results in an accurate drain conductance equation. The value for the carrier saturated velocity extracted from the I-V data for different CMOS technologies is 7-8×10⁶ cm/s for electrons and 5-6×10⁶ cm/s for holes, consistent with the reported values. The model not only predicts accurate output conductance, which is important for analog design, but also accurately simulates intrinsic gate capacitances for short channel devices. Since the model is inherently continuous, device conductances and capacitances are smooth and continuous at the transition points. This continuity results in enhanced convergence properties of the circuit simulator SPICE. Because the model is physically based, the temperature dependence of device characteristics in the temperature range 0-120°C can easily be predicted simply by taking the temperature dependence of the threshold voltage, carrier mobility and velocity saturation parameters     

Generator for a custom statistical bipolar transistor model

An automated model generator (MG) has been developed for a rectangular bipolar device with arbitrary and nonsymmetrical separations of rectangular regions around the emitter perimeter. The MG provides a transistor equivalent circuit whose parameters are determined using a distributed network representing a three-dimensional transistor configuration. The network accounts for nonlinear device dependencies associated with horizontal layout and process technologies. The elements of the distributed network are simple units whose parameters ar derived from measurements or two-dimensional process and device simulations. The MG is versatile and offers several photolithography and processing technology options, with recessed oxide or oxide-nitride defined standard or polysilicon-type base. The resulting lumped-equivalent circuit is used, along with related models of other transistors or device types, for statistical analysis computations of various circuit configurations at different operating temperatures.     

Self consistent bipolar transistor models for computer simulation

Extended Ebers-Moll models of bipolar junction transistors have proven useful in computer-aided design packages for many years. The most recent refinement has been the incorporation of basewidth modulation or Early effect through a single model parameter called the Early voltage. This paper delineates the conditions under which a unique Early voltage can be defined and shows that a necessary condition is the base current must be independent of collector-base voltage. Further, a linearization of the large-signal model around a d.c. operating point leads to a small-signal hybrid-pi model in which the collector-base resistor r_u is necessarily absent. The absence of r_u has many implications in the design of high performance amplifier circuits.     

Two-dimensional computer simulation for switching a bipolar transistor out of saturation

A two-dimensional numerical analysis for the turnoff of a bipolar transistor from high injection level (VBE= 900 mV) is carried out. VBCis being kept constant at 1 V. Distributions of potential, electron, and hole density are interpreted and lead to a subdivision of the total transient time into four time regions, each governed by a single phenomenon. These phenomena are 1) fast discharge of the sidewall transistor, 2) the "lateral wave" which has the dominating influence in the total switching time, 3) the vertical discharge, and 4) the emitter discharge. The transient behavior is essentially ruled by two-dimensional lateral effects. Hence one-dimensional models are not adequate for switching a transistor out of saturation.     

Internally biased transistor simulation model

An augmented transistor model where a three-terminal device is atomically biased internally is presented. A duplicate of the signal transistor is used to solve the bias equation. This model makes it convenient to compare circuit topologies by simulation     

Evaluation of surface-potential-based bulk-charge compact MOS transistor model

The existing surface-potential-based compact metal-oxide-semiconductor transistor models are based on the 1978 Brews delta-function charge-sheet approximation, which was derived empirically from the 1966 Pao-Sah drift-diffusion double integral formula. This paper provides a device physics-based derivation of a surface-potential-based compact model by analytical approximation of the double and single bulk-charge integrals of the four one-dimensional components of the six-component 1996 Sah two-dimensional formula. In this compact model development, the mobile carrier-space-charge-limited parabolic-drift and linear-diffusion current components are analytically represented by the surface potential without approximation, while the immobile-impurity bulk-space-charge-limited double-integral drift-current and single-integral diffusion-current components are evaluated analytically using three possible surface-potential compact model approximations. This paper calculates the accuracy of these approximate analytical bulk-charge-limited drift and diffusion current components in both the inversion and subthreshold ranges and discusses factors that affect the accuracy in the subthreshold range and near flatband.     

An Ebers-Moll model for the heterostructure bipolar transistor

An Ebers-Moll model for the heterostructure bipolar transistor (HBT) is developed. The model describes both single and double heterojunction transistors with or without band spikes and applies to uniform or graded base HBTs. Model parameters are directly related to device parameters such as doping densities, dimensions and band spikes. Junction velocities are introduced to describe the transport of carriers across the junctions. Results demonstrate that even for compositionally graded junctions, transport across the junctions may limit HBT performance if the base is graded. Use of the model is illustrated by examining a recently proposed technique for extracting conduction band spikes by comparing forward and inverted I-V characteristics.     

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part II: parameter extraction and experimental results

A compact bipolar transistor model was presented in Part I that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM but at the same time, from a computational point of view, suitable for simulating large circuits. In Part II, a parameter determination procedure is described and demonstrated for a variety of SiGe process technologies.     

An analytical model for the epitaxial bipolar transistor

In the n⁺pn^?n⁺ transistor, high-current effects in the base and collector regions are linked within the current ranges of practical interest. To describe such effects, we have derived an analytical model that is based primarily on five assumptions: (1) the structure is approximately one-dimensional; (2) recombination is negligible in the base and collector quasi-neutral regions, and in the three space-charge regions; (3) high-current effects are negligible in the emitter and n⁺-substrate regions; (4) the Fletcher boundary conditions (or the Misawa boundary conditions) can be used for the three space-charge regions; and (5) the ambipolar approach can be used for the base and collector quasi-neutral regions. The primary findings predicted by the n⁺pn^?n⁺ transistor model are: In current ranges of practical interest (usable current gain), the electron concentration profile has a significant “vertical step” located at the collector-base metallurgical junction for all values of collector current. In the limit of extremely-high-current operation, this step tends to vanish. In the current range where the current gain begins to decline rapidly with increasing collector current, the electron concentration at the base boundary of the collector-base space-charge region goes approximately as the square of the hole concentration at the collector boundary of the same region. Because of this relationship, a charge-control calculation is more difficult than a straightforward calculation of carrier concentration for a given degree of accuracy. The n⁺pn^?n⁺ transistor model (which consists of twelve algebraic equations) is particularly useful for the practically important case of an epitaxial bipolar transistor having a very thin, heavily-doped base region.     

VBIC95: an improved bipolar transistor model

A new compact bipolar transistor model for circuit simulators that has already received widespread support in the industry, is considered. The model, VBIC95, was constructed to be the industry standard replacement for the aging SPICE Gummel-Poon model (SGP). Users of the 20-year-old SGP model have found it to be inadequate in representing, many of the physical effects important in modern bipolar transistors used in analog and mixed-signal microcircuits. VBIC95 advantages include: 1. Improved static temperature modeling; 2. Correct implementation of the Early effect; 3. An improved forward-biased junction capacitance option; 4. Inclusion of overlap capacitance; 5. Null high-current modeling (updated with NPN V_sat equations); 6. Improved high-level diffusion capacitance modeling; 7. Inclusion of substrate transistor with R_c and variable Beta; 8. Approximate accounting for distributed effects in the input circuit; 9. Consistent treatment of excess phase in transient and small signal analyses; 10. Models weak avalanche effect; 11. All equations differentiable to a high order; 12. Distributed input impedance models AC emitter crowding; and 13. No special test structures required thus minimizing problems with extracting the new model parameters from old data     

Modeling base crowding in a bipolar transistor

It is shown that in a model of a bipolar transistor with a rectangular configuration, the base-crowding effect may be represented by a diode and a resistor in parallel between the internal base point and the external base connection with an accuracy of better than four percent.     

Horizontal current bipolar transistor (HCBT): a new concept ofsilicon bipolar transistor technology

A new concept of silicon bipolar transistor technology is proposed. The resulting horizontal current bipolar transistor (HCBT) is simulated assuming the 0.25 μm technology. The surface of the device is smaller than conventional super-self aligned bipolar transistors. The same doping profile as in known vertical current devices is achieved by simpler technology using single polysilicon layer, without conventional epitaxial and n⁺ buried layers and with reduced number of lithography masks and technological steps. The simulated dc and ac characteristics of HCBT are similar to the characteristics of standard SST devices     

A nonquasi-static table-based small-signal model of heterojunction bipolar transistor

A nonquasi-static table-based (NQS-TB) small-signal model, which has been used successfully in modeling FETs, is applied to a heterojunction bipolar transistor (HBT). The capacitive couplings associated with base cause the conventional model to be invalid at high frequencies. To take these effects into account, a new model is proposed that is compatible with a small-signal T-model topology. We demonstrate good agreement between the measured and simulated S-parameters over the range of 1-40 GHz.     

An advanced physics-based sub-circuit model of a punch-trough insulated gate bipolar transistor

An advanced sub-circuit model of the punch-trough insulated gate bipolar transistor (PT IGBT) based on the physics of internal device operation has been described in this article. The one-dimensional physical model of low-gain wide-base BJT is employed based on the equivalent non-linear lossy transmission line, whereas a SPICE Level 3 model is used for the diffused MOST part. The influence of voltage dependent drain-to-gate overlapping capacitance and the conductivity modulated base (drain) ohmic resistance are modelled separately. The main advantages of novel PT IGBT model are a small set of model parameters, an easy implementation in SPICE simulator and the high accuracy confirmed by comparing the simulation results with the electrical measurements of test power circuit.