Clock distribution for BaF_2 readout electronics at CSNS-WNS

A BaF_2(Barium Fluoride) detector array is designed to precisely measure the(n, γ) cross section at the CSNS-WNS(white neutron source at China Spallation Neutron Source). It is a 4π solid angle-shaped detector array consisting of 92 BaF_2 crystal elements. To discriminate signals from the BaF_2 detector, a pulse shape discrimination method is used, supported by a waveform digitization technique. There are 92 channels for digitizing. The precision and synchronization of clock distribution restricts the performance of waveform digitizing. In this paper, a clock prototype for the BaF_2 readout electronics at CSNS-WNS is introduced. It is based on the PXIe platform and has a twin-stage tree topology. In the first stage, clock is synchronously distributed from the tree root to each PXIe crate through a coaxial cable over a long distance, while in the second stage, the clock is further distributed to each electronic module through a PXIe dedicated differential star bus. With the help of this topology, each tree node can fan out up to 20 clocks with 3U size. Test results show the clock jitter is less than 20 ps, which meets the requirements of the BaF_2 readout electronics. Besides, this clock system has the advantages of high density, simplicity, scalability and cost saving, so it can be useful for other clock distribution applications.     

基于开关电容阵列ASIC芯片的多通道波形数字化系统设计

基于开关电容阵列（SCA）技术可以实现超高速的波形数字化。本研究是基于实验室设计完成的FEL_SCA芯片进行8通道2 Gsps的波形数字化模块的设计,电路的配置和读出控制功能集成在单个FPGA中完成,此外该模块还包含SDRAM缓存及USB接口。目前已在实验室环境下对其进行了直流电压测试、瞬态波形测试和带宽测试,测试结果表明,在FEL_SCA芯片的输入动态范围100 mV~1 V之间,本波形数字化模块的INL好于1%,通道的RMS噪声约为1.76 mV,带宽约为450 MHz,达到设计目标。Switched Capacitor Arrays (SCAs) can be employed to achieve high speed waveform digitization. In this paper, we designed an 8-channel 2 Gsps waveform digitization module using four SCA chips named FEL_SCA which was designed in our laboratory. In this module, we used a FPGA device for data readout and circuit configuration. Besides, a 128 Mb SDRAM and USB interface were integrated in this module. We have also conducted DC voltage tests, transient tests and bandwidth tests on this module. The results indicate that in the signal voltage range 100 mV~1 V, the INL is better than 1%, the RMS noise is about 1.76 mV and the -3 dB input bandwidth is 450 MHz.     

A Clock Enhanced Loop for Simultaneous Error-Free Demultiplexing and Clock Recovery of 160Gb/s OTDM Signal Single-Channel Transmission over 100km

A simple clock enhanced loop of cascaded electro-absorption modulators （EAMs） and 10 GHz clock recovery modules is presented. The intensity of harmonic of clock-frequency component is analyzed theoretically and verified experimentally in a 160 Gb/s OTDM 100 km transmission system. The 10 GHz clock component is enhanced obviously before launching into the clock recovery module and the recovered clock signal exhibits low rms jitter of 〈400 fs. Moreover, completely error^-1free （10-12） transmission is observed for more than two hours without using forward error correction technology. The power penalty is about 3.6 dB. The proposed loop has merits of enhancing base clock component, simultaneously de-multiplexing and clock recovery, which make the performance of this loop more stable and high suppression of non-target channels.     

Interface engineering to decrease interdiffusion and improve thermal stability of EUV multilayer

We use interface engineering technology to obtain high interface quality of extreme ultraviolet （EUV） multilayer. By inserting ultrathin （〈0.5 nm） B4C layer between Mo and Si layers in Mo/Si multilayer, the interdiffusion in the multilayer is decreased obviously and the reflectivity can be estimated to increase by 2%. By inserting a new inert material barrer between Mo and Si layers, the thermal stability of new forming Mo/X/Si/X multilayer is increased significantly. The multilayer is annealed at 500 ℃ for 100 h with the fluctuation of period thickness smaller than 0.1 nm, and the high resolution transmission electron microscopy image also shows that the mirostructure of the multilaver is not changed obviously.     

Preliminary results for the design,fabrication,and performance of a backside-illuminated avalanche drift detector

The detection of low-level light is a key technology in various experimental scientific studies. As a photon detector, the silicon photomultiplier （SiPM） has gradually become an alternative to the photomultiplier tube （PMT） in many applications in high-energy physics, astroparticle physics, and medical imaging because of its high photon detection efficiency （PDE）, good resolution for single-photon detection, insensitivity to magnetic field, low operating voltage, compactness, and low cost. However, primarily because of the geometric fill factor, the PDE of most SiPMs is not very high; in particular, for those SiPMs with a high density of micro cells, the effective area is small, and the bandwidth of the light response is narrow. As a building block of the SiPM, the concept of the backside-illuminated avalanche drift detector （ADD） was first proposed by the Max Planck Institute of Germany eight years ago; the ADD is promising to have high PDE over the full energy range of optical photons, even ultraviolet light and X-ray light, and because the avalanche multiplication region is very small, the ADD is beneficial for the fabrication of large-area SiPMs. However, because of difficulties in design and fabrication, no significant progress had been made, and the concept had not yet been verified. In this paper, preliminary results in the design, fabrication, and performance of a backside-illuminated ADD are reported; the difficulties in and limitations to the backside-illuminated ADD are analyzed.     

High speed fiber-based clock enhancement of NRZ data

A scheme for all-fiber clock enhancement of non-return-to-zero (NRZ) data based on cross-phase modulation (XPM) effect in nonlinear fibers is proposed and demonstrated in simulation. The simulation results indicate that the clock-to-data ratio of NRZ signals at 64 Gb/s can be increased to 22.94 dB by using this scheme, and the pattern effect in clock enhanced signals is very weak. The ability of high speed operation up to 140 Gb/s of this scheme is also proved in our simulation.     

Recent research development of FinFETs

正The rapid development of CMOS technology is driven by the device scaling down. Classical MOS devices have encountered difficulties and challenges as scaling down to nanoscale [1], which seriously affects the device performance and limits the further development of CMOS technology.Because of the excellent control over short-channel effects and high current drive capability, novel multi-gate MOS     

Multiwavelength All-Optical Clock Recovery of Non-Return-to-Zero Data

A novel scheme of all-optical clock recovery from mutiwavelength non-return-to-zero （NRZ） data stream is proposed and demonstrated. The chirp induced by a chirped fibre Bragg grating and a semiconductor optical amplifier is used to enhance the clock. The clock is recovered after injecting the enhanced signal into the scheme based on the stimulated Brillouin scattering. The experiment is carried out and the dual-wavelength clock is recovered. This novel scheme can realize clock recovery of multiwavelength NRZ signal in the total wavelength range of 3.3nm. This clock recovery technology is transparent to the data bit rate and modulation format, also without pattern dependence.     

Recent improvements on the pulsed optically pumped rubidium clock at SIOM

We report the recent progress of our pulsed optically pumped(POP) vapor cell rubidium clock with dispersive detection.A new compact physics package is made.A rubidium cell with a high precision buffer gases mixing ratio is obtained,and the temperature controlling system is renovated to reduce fractional frequency sensitivity to temperature variation.The resolution of the servo control voltage is also optimized.With these improvements,a clock frequency stability of 3.53×10~(-13) at 1s is obtained,and a fractional frequency stability of 4.91×10~(-15) is achieved at an average time of τ=2000 s.     

HIGH POWER LASER SCIENCE AND ENGINEERING

<正>High Power Laser Science and Engineering(HPLaser)is a newly established,peer-reviewed,and open access journal,providing a forum for the communication of scientific and engineering advances in high power lasers and related fields.The journal publishes research that seeks to uncover the related underlying science and engineering in the fields of high energy density physics,high power lasers,advanced laser technology and applications,     

ANALYSIS OF WAVEFORM ERRORS IN MILLIMETER-WAVE LFMCW SYNTHETIC APERTURE RADAR

In remote sensing applications, there is a special interest in the lightweight, cost effective, and high resolution imaging sensors. The combination of linearly frequency modulated continuous wave (LFMCW) technology and synthetic aperture radar (SAR) technique can lead to such a sensor. This paper concentrates on the analysis of waveform errors in millimeter-wave (MMW) LFMCW SAR. The generating scheme of millimeter-wave LFMCW waveforms with phase locked loop (PLL) and direct digital synthesizer (DDS) combined frequency synthesizer is investigated. The impacts of quantization errors, spurs, and frequency nonlinearities are analyzed. Simulation results show that the quality of LFMCW waveforms has a direct influence on the SAR images. Hence a scheme of frequency synthesizer to achieve high performance MMW LFMCW waveform is proposed. This synthesizer driven by a DDS array can adaptive suppress the spurious level without degradation of excellent frequency linearity and fast switching speed.     

基于FPGA 的超导动态电感探测器频梳读出信号产生

超导动态电感探测器(Kinetic Inductance Detectors, KIDs) 作为一种新型的超导探测器, 在天文学等领域得到了广泛应用, 具有高灵敏度、 高能量分辨率等优点, 并且可以通过频域复用直接扩展到大型阵列. 然而, 为了支持上千像素的探测,KIDs 阵列需要产生复杂的频梳信号, 占用较大的信号带宽. 因此, 数模转换器件(Digital-to Analog Converter, DAC) 的采样率对于 KIDs 阵列的读出电路实现至关重要. 基于JESD204B 传输协议的高速 DAC相较于传统低电压差分信号(Low-Voltage Differential Signaling, LVDS) 协议的转换器具有更高的采样率和传输速率, 可用于频梳信号波形的产生. 为此, 本文提出了一种基于现场可编程门阵列(Field Programmable Gate Array, FPGA) 的设计, 以 Xilinx 公司 Kintex-7 系列 FPGA 为主控芯片, 通过高速串行接口JESD204B 和高速 DAC 芯片AD9136 实现高速数据传输,DAC 采样率为2 GSPS, 能生成带宽为1 GHz 的基带信号. 实验结果表明, 该设计能够有效地生成复杂的频梳信号, 具有较高的信号质量和灵活性, 解决了传统 DAC 及直接数字频率合成(Direct Digital Synthesizer, DDS) 器件难以产生复杂多变波形的难题, 有助于拓展 KIDs 阵列的工程应用.     

电子-质子对撞机上的Primakoff物理

Primakoff效应具有独特的动力学筛选条件,是研究原子核和粒子物理的强大的实验工具。未来电子-离子对撞机(EIC)机器具有质心能量高、亮度高、动力学范围广、本底低、探测器探测效率高以及碰撞离子种类丰富等优点。这将为我们开启一扇通往Primakoff物理研究的新时代的大门。在EIC机器上开展Primakoff物理实验可以严格检验量子色动力学的基本对称性,研究强子的电弱相互作用性质,并探索超出标准模型的新物理。Primakoff效应实验是EIC物理研究的又一亮点。     

一种非连续微波探询信号的实现

铷原子频标（RAFS）的微波探询信号可用于激励铷原子产生基态能级之间的跃迁,从而实现共振探测.目前常用的微波产生方案都存在电路结构复杂、功耗大、不便于集成的缺点.本文提出了一种利用锁相环（PLL）技术产生非连续微波探询信号的设计方案,这种方案以10 MHz信号作为参考频率,在单片机的合理配置下可直接得到（6 834.687 5 MHz±f_M）信号（f_M表示最大频偏）.该方案具有电路结构简单、功耗低、数字化程度高等优点,利用该方案实现的整机稳定度优于1.5E-11/√τ（1 s≤τ≤100 s）,性能指标均可满足小型商业铷原子钟要求.     

多气隙电阻板室飞行时间谱仪技术

基于多气隙电阻板室(MRPC)技术的飞行时间谱仪广泛应用于现代物理实验,并在粒子鉴别中发挥了重要作用.随着加速器能量和实验亮度的提高,对飞行时间谱仪的粒子计数率和时间分辨要求越来越高.MRPC飞行时间谱仪按技术上可以分成三代.从第一代到第三代,计数率要求越来越高( 30 kHz/cm~2),时间精度也更加严格(20 ps),相应的探测器结构和读出电子学系统呈现出不同的特性.本文总结了三代飞行时间谱仪技术的主要技术特点及主要物理实验,介绍了已经取得的应用成果,提出了该技术的未来发展方向.同时也介绍了MRPC探测器在工业及医学方面的应用.     

高功率激光装置前端系统激光脉冲的时间整形及修正技术

针对激光惯性约束聚变实验研究对高功率激光驱动器前端系统复杂时间形状种子激光脉冲的需求,应用孔径耦合带状线集成波导整形系统设计了满足需要的前端整形激光脉冲。用一种新方法精确计算了孔径耦合带状线电脉冲整形器的耦合系数和孔径宽度的数值关系,并针对高衬比度整形激光脉冲的需求,提出了高衬比度双极型集成波导整形系统方案。由该系统可以得到100 ps脉冲前沿、1～3 ns脉冲宽度可调、高衬比度(大于100:1)、光滑无纹波调制、可精确满足神光Ⅱ八路及第九路装置需求的前端整形激光脉冲。     

基于MAX9259/MAX9260的CameraLink图像数据光纤传输技术

为了提高光电经纬仪上图像传输系统的性能,建立了光纤传输系统,本文针对传统Camera Link光纤传输系统方案中FPGA开发繁琐的问题,结合Camera Link接口协议和串行/解串行技术,设计了一种新的base型Camera Link的光纤传输系统,该系统采用Ser Des芯片组MAX9259/MAX9260代替编解码芯片,实现数据在Cameralink并行接口与光电转换模块串行接口之间的相互转化,并通过两种实验方案验证了系统的可行性。该方案省去传统方案中时分复用及异步FIFO缓存,降低了光纤传输系统的开发难度,并缩短了研发周期。实验结果表明:系统传输速率达到2. 5 Gb/s,具有传输稳定可靠,传输图像质量好,带宽高,抗电磁干扰能力强等特点,可满足多种像素时钟相机的需求。     

长塑料闪烁计数器教学实验的研究

将长塑料闪烁计数器引入核与粒子物理实验教学 ,实验中测量了长塑料闪烁体技术衰减长度等性能参量 ,并取得了较好的教学效果 .     

装药方式对铜/钢爆炸焊接界面波的影响及波形成机理

为了改善爆炸焊接质量,解决高噪低效的问题,选取Cu为复板、Q235钢为基板,采用LS-DYNA软件和光滑粒子流体动力学方法分别设计了均匀布药和梯形布药方案,研究了硝铵炸药对爆炸焊接界面波的影响。均匀布药结果显示:沿着爆轰方向碰撞压力逐渐增大;炸药量越多,碰撞压力越大,界面波波形越大。梯形布药方案中,通过改变炸药起爆端和末端的高度,设计了4种方案,结果显示:梯形布药可以消除爆炸焊接界面波不均匀现象,使界面波形尺寸基本保持一致,而且节省了炸药用量;当起爆端和末端的高度分别为67.2 mm和42.0 mm时,波形效果最好。通过研究界面波的形成过程可知,SPH法模拟的界面波形成过程与复板流侵彻机理的一致性较好,证明了复板流侵彻机理解释界面波形成过程的有效性。