1.25Gb/s InP基多量子阱激光器与HBT驱动电路的单片集成

描述了一种基于InP材料沿[011]晶向湿法化学腐蚀形成平滑侧壁实现的InP基多量子阱激光器和异质结双极晶体管驱动电路单片集成.通过一个横向缓冲台面结构,降低了激光器阳极和晶体管集电极互连工艺的难度,改善了光发射单片光电集成电路的可制造性.采用该方法制作的光发射单片直流功耗为120mW,在码长223-1传输速率1.5Gb/s伪随机码信号调制下有清晰的眼图,光输出功率为2dBm.     

InP系波导和光电探测器单片集成

本文主要报道ＩｎＰ光波导和ＩｎＧａＡｓ－ＰＩＮ光电探测器的单片集成，包括材料生长、器件工艺、器件测试三个部份．器件的结构和制作方法较为简单，而代表器件性能的主要参数可与国外同类器件相接近，如光波导损耗最小为８．６ｄＢ／ｃｍ，器件正向压降为０．４～０．６Ｖ，反向击穿电压＞４０Ｖ，响应度～０．５Ａ／Ｗ，上升时间＜０．９ｎｓ．     

InP基单片集成光接收机的研究与进展

总结了InP基单片集成高速光接收机的主要集成形式,分析了各种集成方式的优缺点,重点总结了最具发展潜力的PIN-HEMT光接收机的研究与进展,最后指出单片集成光接收机的发展方向.     

单片集成接收机的研究与发展

本文探讨了四种类型的单片集成接收讥的结构、性能,生产工艺的发展状况,以及存在的问题和未来的发展趋势。     

GaAs单片集成激光器驱动电路在片测量

用多触头微波探针,对GaAs单片集成激光器驱动电路芯片进行了在片测试和筛选,测得芯片频率响应带宽为3.8GHz.使用高速增益开关半导体激光器作为采样光脉冲源,采用了背面直接采样方式建立了电光采样测试仪.检测了GaAs单片集成激光器驱动电路芯片内部点的高速电信号波形.     

GaAs单片集成激光器驱动电路在片测量

用多触头微波探针 ,对 Ga As单片集成激光器驱动电路芯片进行了在片测试和筛选 ,测得芯片频率响应带宽为 3.8GHz.使用高速增益开关半导体激光器作为采样光脉冲源 ,采用了背面直接采样方式建立了电光采样测试仪 .检测了 Ga As单片集成激光器驱动电路芯片内部点的高速电信号波形 .     

2.5Gb/s1.55μm InGaAsP/InP分布反馈激光器/电吸收调制器单片集成器件

本文在已经报道的采用直接集成方法制作的１．５５μｍＩｎＧａＡｓＰ／ＩｎＰ部分增益耦合ＤＦＢ激光器与电吸收调制器的单片集成器件的基础上,进一步对器件的性进行了改进,并采用标准１４脚碟型管壳对集成器件进行了封装。封装后的发射模块阈值电流约为２０￣３０ｍＡ,边模抑制比大于４０ｄＢ,耦合输出光功率大于２ｍＶ,在３Ｖ的反向调制民压下消光比约为１７ｄＢ。我们还在２．５Ｇｂ／ｓ波分复用系统上对集成器件进行了传输     

0.18 μm CMOS 10 Gb/s光接收机的单片集成数据再生电路

利用TSMC 0.18 μm CMOS工艺设计的,应用于光纤传输系统SDH STM-64速率级(10 Gb/s)的单片光接收机.该接收机包括限幅放大器、时钟恢复、数据判决电路.后仿真可工作在10 Gb/s速率上.该电路采用1.8 V电源电压,功耗500 mW,50 Ω负载上单端输出.摆幅340 mV,芯片面积1.968 mm×1.135 mm.     

一种新的低压直流耦合1.25 Gb/s激光二极管驱动电路

文中提出一种输出结构能克服传统的激光二极管驱动电路在直流耦合方式下不支持低电源电压操作的问题。新的APC能稳定输出平均光功率和消光比分别在0.3dBm和±0.4dB(-40°C~100°C)范围内。此外,快速二分查找算法使APC初始化时间不超过0.6μs,突发开启和突发关断延时小于5ns,满足PON要求。样片采用TSMC0.8μmBiCMOS工艺实现,芯片面积为1.56mm×1.67mm,功耗为105mW。     

DC-Coupled Burst-Mode Laser Diode Driver with Automatic Power Control for 1.25Gbit/s PON System

An integrated burst-mode laser diode driver is presented for PON application. The bias current range and modulation current range are 1–75 mA and 5–80 mA respectively. The DC-coupled interface between the driver and the laser diode can tolerate the output transient voltage as low as 0.6v. The novel digital APC loop can stabilize the output average optical power and extinction ratio respectively within ± 0.3 dBm and ± 0.4 dB (−40 to 100^∘C) with less than 0.6 μs initialization time and infinite bias current and modulation current hold time. Moreover, the fast burst response is achieved with burst on/off time less than 5 ns. The chip is implemented in a TSMC 0.35-μm SiGe BiCMOS technology and occupies an area of 1.56 × 1.67 mm² with power consumption of 105 mW from a supply voltage of 2.5 v.     

A realization of a high-frequency monolithic integrator with low power dissipation and its application to an active RC filter

According as the fine LSI process technique develops, the technique to reduce power dissipation of high-frequency integrated analog circuits is getting more important. This paper describes a design of high-frequency integrator with low power dissipation for monolithic leapfrog filters. In the design of the conventional monolithic integrators, there has been a great difficulty that a high-frequency integrator which can operate at low supply voltage cannot be realized without additional circuits, such as unbalanced-to-balanced conversion circuits and common-mode feedback circuits. The proposed integrator is based on the Miller integrator. By a PNP current mirror circuit, high CMRR is realized. However, the high-frequency characteristic of the integrator is independent of PNP transistors. In addition, it can operate at low supply voltage. The excess phase shift of the integrator is compensated by insertion of the compensation capacitance. The effectiveness of the proposed technique is confirmed by PSPICE simulation. The simulation results of the integrator shows that the common-mode gain is efficiently low and the virtual ground is realized, and that moderate phase compensation can be achieved. The simulation results of the 3rd-order leapfrog filter using the integrator shows that the 50 MHz-cutoff frequency filter is obtained. Its power dissipation in operating 2 V-supply voltage is 5.22 mW.