High‐performance In–Zn–O thin‐film transistors with a soluble processed ZrO2 gate insulator

Spin‐coated zirconium oxide films were used as a gate dielectric for low‐voltage, high performance indium zinc oxide (IZO) thin‐film transistors (TFTs). The ZrO₂ films annealed at 400 °C showed a low gate leakage current density of 2 × 10^–8 A/cm² at an electric field of 2 MV/cm. This was attributed to the low impurity content and high crystalline quality. Therefore, the IZO TFTs with a soluble ZrO₂ gate insulator exhibited a high field effect mobility of 23.4 cm²/V s, excellent subthreshold gate swing of 70 mV/decade and a reasonable I_on/off ratio of ～10⁶. These TFTs operated at low voltages (～3.0 V) and showed high drain current drive capability, enabling oxide TFTs with a soluble processed high‐k dielectric for use in backplane electronics for low‐power mobile display applications. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Representation of type I heterostructure junctionless tunnel field effect transistor for high-performance logic application

In this paper, a gate-all-around junctionless tunnel field effect transistor (JLTFET) based on heterostructure of compound and group III–V semiconductors is introduced and simulated. In order to blend the high tunneling efficiency of narrow band gap material JLTFETs and the high electron mobility of III–V JLTFETs, a type I heterostructure junctionless TFET adopting Ge–Al _x Ga_1?x As–Ge system has been optimized by numerical simulation in terms of aluminum (Al) composition. To improve device performance, we considered a nanowire structure, and it was illustrated that high-performance logic technology can be achieved by the proposed device. The optimal Al composition founded to be around 20 % (x = 0.2). The numerical simulation results demonstrate that the proposed device has low leakage current I _OFF of ~1.9 × 10^?17, I _ON of 4 µA/µm, I _ON/I _OFF current ratio of 1.7 × 10¹¹ and subthreshold swing SS of 12.6 mV/decade at the 40 nm gate length and temperature of 300 K.     

Device design of single-gated feedback field-effect transistors to achieve latch-up behaviors with high current gains

In this study, a device design of single-gated feedback field-effect transistors (FBFETs) is proposed to achieve latch-up behaviors with high current gains. The latch-up mechanism is examined by conducting an equivalent circuit analysis, and the band diagram, I–V characteristics, memory window, subthreshold swing, and on/off current ratio are investigated using a commercial device simulator. The proposed FBFETs exhibit memory windows wider than 3.0 V, subthreshold swings less than 0.1 mV/decade, the on/off current ratios of approximately 10¹⁰, and on-currents of approximately 10⁻⁵ A at room temperature. The superior device characteristics and controllable memory windows open the promising possibility of FBFETs as the next-generation electronic devices.     

Memory properties of a Ge nanocrystal MOS device fabricated by pulsed laser deposition

The charge–storage properties of Ge nanocrystal (Nc) memory devices with MOS structure have been studied. The Ge nanocrystals (Ncs) were prepared on a p-Si (100) matrix by means of pulsed laser deposition (PLD) combined with rapid annealing in the presence of Ar gas. The device is characteristic of better switching characteristics (the I _on/I _off>10⁵), low leakage current, which was attributed to the effect of Coulomb blockade preventing injection. A significant threshold-voltage shift of 0.85 V was observed when an operating voltage of 5 V was implemented on the device. The kind of hysteresis behavior in the double sweep suggests that the device has a good electrostatic control over the Ge Nc channel.     

Effect of temperature–bias annealing on the hysteresis and subthreshold behavior of multilayer MoS2 transistors

The transfer characteristics (I_D–V_G) of multilayers MoS₂ transistors with a SiO₂/Si backgate and Ni source/drain contacts have been measured on as‐prepared devices and after annealing at different temperatures (T_ann from 150 °C to 200 °C) under a positive bias ramp (V_G from 0 V to +20 V). Larger T_ann resulted in a reduced hysteresis of the I_D–V_G curves (from ～11 V in the as‐prepared sample to ～2.5 V after T_ann at 200 °C). The field effect mobility (～30 cm² V^–1 s^–1) remained almost unchanged after the annealing. On the contrary, the subthreshold characteristics changed from the common n‐type behaviour in the as‐prepared device to the appearance of a low current hole inversion branch after annealing. This latter effect indicates a modification of the Ni/MoS₂ contact that can be explained by the formation of a low density of regions with reduced Schottky barrier height (SBH) for holes embedded in a background with low SBH for electrons. Furthermore, a temperature dependent analysis of the subthreshold characteristics revealed a reduction of the interface traps density from ～9 × 10¹¹ eV^–1cm^–2in the as‐prepared device to ～2 × 10¹¹ eV^–1cm^–2after the 200 °C temperature–bias annealing, which is consistent with the observed hysteresis reduction.

Schematic representation of a back‐gated multilayer MoS₂ field effect transistor (left) and transfer characteristics (right) measured at 25 °C on an as‐prepared device and after the temperature–bias annealing at 200 °C under a positive gate bias ramp from 0 V to +20 V.     

Low-voltage antimony-doped SnO2 nanowire transparent transistors gated by microporous SiO2-based proton conductors

A battery drivable low-voltage transparent lightly antimony（Sb）-doped SnO2 nanowire electric-double-layer （EDL） field-effect transistor （FET） is fabricated on an ITO glass substrate at room temperature. An ultralow operation voltage of 1 V is obtained on account of an untralarge specific gate capacitance （- 2.14 μF/cm2） directly bound up with mobile ions-induced EDL （sandwiched between the top and bottom electrodes） effect. The transparent FET shows excellent electric characteristics with a field-effect mobility of 54.43 cm2/V. s, current on/off ration of 2 × 104, and subthreshold gate voltage swing （S = dVgs/d（logIds）） of 140 mV/decade. The threshold voltage Yth （0.1 V） is estimated which indicates that the SnO2 namowire transistor operates in an n-type enhanced mode. Such a low-voltage transparent nanowire transistor gated by a microporous SiO2-based solid electrolyte is very promising for battery-powered portable nanoscale sensors.     

In–Ga–Zn–O MESFET with transparent amorphous Ru–Si–O Schottky barrier

Rectifying transparent amorphous Ru–Si–O Schottky contacts to In–Ga–Zn–O have been fabricated by means of reactive sputtering without any annealing processes nor semiconductor surface treatments. The ideality factor, effective Schottky barrier height and rectification ratio are equal to 1.6, 0.9 eV and 10⁵ A/A, respectively. Ru–Si–O/In–Ga–Zn–O Schottky barriers were employed as gate electrodes for In–Ga–Zn–O metal–semiconductor field‐effect transistors (MESFETs). MESFET devices exhibiting on‐to‐off current ratio at the level of 10³ A/A in a voltage range of 2 V, with subthreshold swing equal to 420 mV/dec were demonstrated. A channel mobility of 7.36 cm²/V s was achieved. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

InGaAs/InP heterojunction-channel tunneling field-effect transistor for ultra-low operating and standby power application below supply voltage of 0.5 V

An In_0.53Ga_0.47As/InP heterojunction-channel tunneling field-effect transistor (TFET) with enhanced subthreshold swing (S) and on/off current ratio (I_on/I_off) is studied. The proposed TFET achieves remarkable characteristics including S of 16.5 mV/dec, on-state current (I_on) of 421 μA/μm, I_on/I_off of 1.2 × 10¹² by design optimization in doping type of In_0.53Ga_0.47As channel at low gate (V_GS) and drain voltages (V_DS) of 0.5 V. Comparable performances are maintained at V_DS below 0.5 V. Moreover, an extremely fast switching below 100 fs is accomplished by the device. It is confirmed that the proposed TFET has strong potentials for the ultra-low operating power and high-speed electron device.     

High performance Zn–Sn–O thin film transistors with Cu source/drain electrode

Zn–Sn–O (ZTO) thin film transistors (TFTs) were fabricated with a Cu source/drain electrode. Although a reasonably high mobility (μ_FE) of 13.2 cm²/Vs was obtained for the ZTO TFTs, the subthreshold gate swing (SS) and threshold voltage (V_th) of 1.1 V/decade and 9.1 V, respectively, were inferior. However, ZTO TFTs with Ta film inserted as a diffusion barrier, exhibited improved SS and V_th values of 0.48 V/decade and 3.0 V, respectively as well as a high μ_FE value of 18.7 cm²/Vs. The improvement in the Ta‐inserted device was attributed to the suppression of Cu lateral diffusion into the ZTO channel region. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Low voltage organic field effect transistors with a poly(hexylthiophene)–ZnO nanoparticles composite as channel material

We report on solution processable organic field effect transistors prepared using a poly(3‐hexylthiophene)–ZnO nanoparticles composite as channel semiconductor material and cross‐linked polyvinyl alcohol as gate insulator. Our transistors show a field effect mobility of 0.35 ± 0.06 cm²/V s, threshold voltage of –1.30 ± 0.11 V, and I_on/I_off ratio of (1.0 ± 0.1) × 10³. (© 2012 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Gadolinium scandate as an alternative gate dielectric in field effect transistors on conventional and strained silicon

Long channel n-type metal oxide semiconductor field effect transistors on thin conventional and strained silicon on insulator substrates have been prepared by integrating gadolinium scandate as high-κ gate dielectric in a gate last process. The GdScO₃ films were deposited by electron beam evaporation and subsequently annealed in oxygen atmosphere. Electrical characterization of readily processed devices reveals well behaved output and transfer characteristics with high I _on/I _off ratios of 10⁶–10⁸, and steep inverse subthreshold slopes down to 66 mV/dec. Carrier mobilities of 155 cm²/Vs for the conventional and 366 cm²/Vs for the strained silicon substrates were determined.     

Nature of chemical states of sulfur embedded in atomic‐layer‐deposited HfO2 film on Ge substrate for interface passivation

Sulfur was embedded in atomic‐layer‐deposited (ALD) HfO₂ films grown on Ge substrate by annealing under H₂S gas before and after HfO₂ ALD. The chemical states of sulfur in the film were examined by S K‐edge X‐ray absorption spectroscopy. It was revealed that the valences of S‐ions were mostly –2 at Ge/HfO₂ interface (GeS_x or HfO_2–yS_y to passivate the interface), while they were mostly +6 in HfO₂ layers (sulfates; HfO_2–z(SO₄)_z). The leakage current density in post‐deposi‐tion‐treated film was lower than that in pre‐deposition‐treated one. This suggests that the passivation of defects in oxide layer by sulfate ions is more effective to lower the leakage current rather than the interface defect passivation by S^2– ions. (© 2015 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

Design and analysis of Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET)

In this work, a Si-based arch-shaped gate-all-around (GAA) tunneling field-effect transistor (TFET) has been designed and analyzed. Various studies on III–V compound semiconductor materials for applications in TFET devices have been made and we adopt one of them to perform a physical design for boosting the tunneling probability. The GAA structure has a partially open region for extending the tunneling area and the channel is under the GAA region, which makes it an arch-shaped GAA structure. We have performed the design optimization with variables of epitaxy channel thickness (t_epi) and height of source region (H_source) in the Si-based TFET. The designed arch-shaped GAA TFET based on Si platform demonstrates excellent performances for low-power (LP) applications including on-state current (I_on) of 694 μA/μm, subthreshold swing (S) of 7.8 mV/dec, threshold voltage (V_t) of 0.1 V, current gain cut-off frequency (f_T) of 12 GHz, and maximum oscillation frequency (f_max) of 283 GHz.     

A Facile Strategy to Synthesize Cobalt‐Based Self‐Supported Material for Electrocatalytic Water Splitting

Designing and developing active, robust, and noble‐metal‐free catalysts with superior stability for electrocatalytic water splitting is of critical importance but remains a grand challenge. Here, a facile strategy is provided to synthesize a series of Co‐based self‐supported electrode materials by combining electrospinning and chemical vapor deposition (CVD) technologies. The Co, Co₃O₄, Co₉S₈ nanoparticles (NPs) are formed in situ simultaneously with the formation of carbon nanofibers (CNFs) during the CVD process, respectively. The Co‐based NPs are uniformly distributed through the CNFs and they can be directly used as the electrode materials for hydrogen evolution reaction (HER) in acid and oxygen evolution reaction (OER) in alkaline. The Co₉S₈/CNFs membrane exhibits the best HER activity with overpotential of 165 mV at j = 10 mA cm^?2 and Tafel slope of 83 mV dec^?1 and OER activity with overpotential of 230 mV at j = 10 mA cm^?2 and Tafel slope of 72 mV dec^?1. The onion‐like graphitic layers formed around the NPs not only improve the electrical conductivity of the electrode but also prevent the separation of the NPs from the carbon matrix as well as the aggregation.     

Determination of the exchange current in the SOFC composite cathode

To evaluate the exchange current I _o of the oxygen electrode reaction at the O₂ strontium-doped lanthanum manganite (LSM)/yttria stabilized zirconia (YSZ) composite/YSZ interface, the variation of the current I vs overvoltage η is measured at low cathodic and anodic polarizations (−50 to 30 mV). A linear behavior is observed within this potential domain with a unique slope. Taking into account of the dissociative adsorption of the oxygen molecule on the LSM electrocatalyst surface and the charge transferred at the triple-phase boundary, the exchange current is evaluated to 2.93 mA in air at 747 °C.     

Characteristics of pentacene organic thin film transistor with top gate and bottom contact

High performance pentacene organic thin film transistors (OTFT) were designed and fabricated using SiO₂ deposited by electron beam evaporation as gate dielectric material. Pentacene thin films were prepared on glass substrate with S--D electrode pattern made from ITO by means of thermal evaporation through self-organized process. The threshold voltage V_TH was --2.75± 0.1V in 0---50V range, and that subthreshold slopes were 0.42± 0.05V/dec. The field-effect mobility (μ_EF) of OTFT device increased with the increase of V_DS, but the μ_EF of OTFT device increased and then decreased with increased V_GS when V_DS was kept constant. When V_DS was --50V, on/off current ratio was 0.48× 10⁵ and subthreshold slope was 0.44V/dec. The μ_EF was 1.10cm²/(V.s), threshold voltage was --2.71V for the OTFT device.     

100 keV质子辐照对空间GaAs/Ge太阳电池光电效应的影响

利用空间环境模拟设备,用固定能量为100keV、注量为1×10⁹—3×10¹²cm^-2的质子,对空间实用GaAs/Ge太阳电池进行了辐照试验.利用伏安(I-V)特性、光谱响应和光致发光(PL)光谱测试,研究分析了电池的光电效应.试验表明,电池的各种电性能参数如短路电流(I_sc)、开路电压(V_oc)、最大输出功率(P_{m< 关键词： GaAs/Ge太阳电池 质子辐照 光电效应}     

Self‐assembly of poly(3‐hexylthiophene) nanowire networks by a mixed‐solvent approach for organic field‐effect transistors

Organic field‐effect transistors (OFETs) based on interconnected nanowire networks of P3HT have been successfully fabricated by using a mixed‐solvent method. The nanowire network density can be tuned by controlling the anisole/chlorobenzene ratio of mixed solvents. The obtained field‐effect mobility, threshold voltage and the ratio of on‐state current and off‐state current (I_on/I_off) was 0.0435 cm²/V s, –10 V and 1.75 × 10⁴, respectively. The three‐dimensional and interconnected nanowire structure of the networks can enhance the charge transport in P3HT.

     

Electrical properties of Al/p–Ge and Al/Methyl Green/p–Ge diodes

Methyl green (MG) film has been grown for the first time on p–Ge semiconductor using a simple and low-cost drop coating method. The current–voltage (I–V) characteristics of Al/p–Ge and Al/MG/p–Ge diodes have been investigated in the temperature range of 20–300 K. A potential barrier height as high as 0.82 eV has been achieved for Al/MG/p–Ge diode, which has high rectification rate, at room temperature. It is seen that the barrier height of the Al/MG/p–Ge diode at the room temperature is larger than that of Al/p–Ge diode and ideality factor value of 1.14 calculated for Al/MG/p–Ge diode is lower than Al/p–Ge diode. The temperature coefficient of barrier height of the Al/MG/p–Ge diode has been calculated as 2.6 meV/K. The evaluation of current–voltage characteristics shows that the barrier height of the diode increases with the increasing temperature.     

Co3O4 Hollow Polyhedrons as Bifunctional Electrocatalysts for Reduction and Evolution Reactions of Oxygen

It is very important to exploit low‐cost and efficient oxygen reduction reaction (ORR) and oxygen evolution reaction (OER) electrocatalysts for the development of renewable‐energy conversion and storage techniques. Although much attention has been made to develop efficient catalysts for ORR and OER, it is still highly desired to create new bifunctional catalysts. In this study, Co₃O₄ hollow polyhedrons are synthesized as efficient bifunctional electrocatalysts for ORR and OER by simple one‐step annealing Co‐centered metal–organic frameworks (ZIF‐67). Due to the large specific surface areas and high porosity, the as‐prepared Co₃O₄ hollow polyhedrons exhibit excellent electrocatalytic activities for ORR and OER in alkaline media. Co₃O₄ hollow polyhedrons show higher peak current density (0.61 mA cm^?2) with four‐electron pathway than Co₃O₄ particles (0.39 mA cm^?2), better methanol tolerance and superior durability (82.6%) than commercial Pt/C electrocatalyst (58.6%) for ORR after 25 000 s. In addition, Co₃O₄ hollow polyhedrons also display excellent OER performances with smaller overpotential (536 mV) for 10 mA cm^?2 than Co₃O₄ particles (593 mV) and superior stability (86.5%) after 25 000 s. This facile one‐step strategy based on metal–organic frameworks self‐sacrificed templates can be used to develop the promising well‐defined porous hollow metal oxides electrode materials for energy conversion and storage technologies.