含磁单负材料一维光子晶体的隧穿模特性

构造了由磁单负材料A、普通材料B( SiO2)和C(TiO2)组成的(AB)NC(BA)N型一维光子晶体,数值计算结果表明在3100～3700 nm的波长范围内出现了6个隧穿模.这些隧穿模有不同于传统缺陷模的特征:入射角θ、C介质层的位置、光子晶体的周期数N和A、B两层介质的几何厚度都不影响各隧穿模的位置.在θ＞46θ时,长波段的隧穿模消失.磁单负材料的介电常数变化,不影响隧穿模的个数和透射率.A、B两层介质的几何厚度变化量小于5;时,不影响各隧穿模的透射率,而C介质层的几何厚度对隧穿模的位置有影响.C介质层移动的单元数相同,隧穿模的变化也相同.     

反应烧结碳材料表面异质外延生长SiO2晶体的研究

利用高温反应烧结在不同结构碳材料表面热蒸发进行二氧化硅(SiO2)晶体的外延生长.采用X-射线衍射仪(XRD)、扫描电镜(SEM)和电子能谱仪(EDS)分析和研究了碳材料表面生成物的物相组成与显微形貌,探讨了SiO2晶体的外延生长机理.研究结果表明,不同结构碳材料表面能外延生长SiO2晶体,但形态不同.在碳纤维表面形成颗粒和短晶须状SiO2晶体,在石墨片上形成凸起团聚状SiO2晶体,而在金刚石表面首先形成了Si-O涂层,然后在Si-O涂层上生长棒状SiO2体.碳材料外延生长SiO2晶体是首先通过热蒸发法使Si沉积到碳材料表面,然后Si与体系中的O反应形成SiO2晶核,在不同结构碳材料表面生长SiO2晶体.     

纳米尺寸高k/Si1-xGex NMOS场效应管性能的数值模拟研究

本文展开了高介电常数(k)栅介质Si1-xGexNMOS场效应管性能的数值模拟研究,基于有限元法,建立了纳米尺寸(栅长=15 nm)NMOS场效应管模型.为了研究栅介质和衬底材料参数变化对器件性能的影响规律,利用数值分析手段,在衬底Si1-xGex中Ge组分x从0到1变化区间,选取不同介电常数的栅介质,且其厚度在一定范围内变化时,综合分析了纳米尺寸NMOS场效应管的转移特性曲线和输出特性曲线.分析表明,在栅介质的k值和厚度一定时,随着衬底中Ge组分x从0逐渐增大增加,器件阈值电压持续减小,直到x为85;时突然变大,而在Ge组分继续增大时,阈值电压又维持减小趋势.为了尽量避免隧穿效应,研究了高k栅介质厚度高于5 nm时的器件特性,结果表明,随着栅介质厚度的减小,器件阈值电压减小,驱动电流则持续增大.     

TiO2/SiO2双层减反射膜的制备及其性能研究

采用真空电子束蒸发法制备TiO2/SiO2双层减反射膜,实现宽波段范围内的低反射率,以满足砷化镓三结太阳电池对入射光的需求.主要研究了基片温度、电子束流和充氧量对TiO2、SiO2单层膜性能(膜层厚度、折射率)的影响.研究过程中,按照三因素两水平的正交实验进行,用分光光度计对TiO2、SiO2薄膜样品的折射率进行测试.实验结果显示,两种氧化物介质膜的折射率均随基片温度和束流的升高而增加,随氧压的升高而降低,工艺参数对TiO2膜性能影响较大.     

不同磨料对蓝宝石晶片化学机械抛光的影响研究

本文制备了几种含不同磨料(SiC、Al2O3不同粒径SiO2)的抛光液,通过纳米粒度仪分析磨料粒径分布,采用原子力显微镜观察磨料的粒径大小.研究了不同磨料对蓝宝石晶片化学机械抛光(CMP)的影响,利用原子力显微镜检测抛光前后蓝宝石晶片表面粗糙度.实验结果表明,在相同的条件下,采用SiC、Al2O3作为磨料时,材料去除速率与表面粗糙度均不理想;而采用含1;粒径为110 nm SiO2的抛光液,材料的去除速率最高为41.6 nm/min,表面粗糙度Ra=2.3 nm;采用含1;粒径为80 nm SiO2的抛光液,材料的去除速率为36.5 nm/min,表面粗糙度最低Ra=1.2 nm.     

乙烯基三甲氧基硅烷对二氧化硅的超疏水改性研究

采用乙烯基三甲氧基硅烷(VTMO)为改性剂,以氨水为pH调节剂制备改性二氧化硅(SiO2)超疏水材料.通过CA、FTIR和SEM对材料接触角、组成和形貌进行表征.考察了VTMO与SiO2的比例、反应时间、干燥时间对改性二氧化硅超疏水材料接触角和形貌的影响.结果表明,VTMO可在较短时间内改性二氧化硅制备出超疏水二氧化硅粉体,VTMO与SiO2比例对改性SiO2粉体的水接触角和微观二重结构有明显影响,而反应时间和干燥时间的影响较小.     

耐高温、抗冲刷Si-B-O-N系陶瓷透波材料的研究

本研究选择Si3N4-BN-SiO2体系,通过气氛压力烧结工艺(Gas Pressure Sintering,GPS)研制了耐高温、抗冲刷Si-B-O-N系陶瓷透波材料.系统研究了BN和纳米SiO2含量对复合材料力学和介电性能的影响,分析了该材料的显微结构特点及增强机理.实验结果表明:通过控制材料组分和工艺参数的变化,制备的Si-B-O-N系陶瓷透波材料性能良好,弯曲强度:74.7～174.83 MPa;介电常数:3.5～4.2;介电损耗:0.5～4.5×10-3,可满足高性能导弹用陶瓷天线罩对透波材料的要求.     

用磁控溅射和退火方法制备多层锗纳米晶

以Si为衬底,SiO2+Ge为复合靶,用超晶格方法(SiO2+Ge层和SiO2 + GeO2层交替生长)和磁控溅射技术制备镶嵌于Si/Ge氧化膜中的多层Ge纳米晶.X射线衍射(XRD)结果表明:退火样品中有Ge纳米晶生成.Ge纳米晶的声子限域效应引起Raman散射谱的Ge-Ge振动峰向低频移动.X射线光电子能谱(XPS)分析表明Ge主要以Ge0和Ge4+形式分别存在于所制备的超晶格中的SiO2+Ge层和SiO2+GeO2层中.透射电子显微镜(TEM)研究表明,Ge纳米晶被限制在SiO2+Ge层中且结晶性好.实验结果说明,相比于通常的单层介质膜方法,用该超晶格方法极大地提高了Ge纳米晶的密度,尺寸和空间分布的均匀性.     

提高掺铒硅基纳米材料发光效率的探索

本文中,我们以SiO2介质镶嵌的纳米晶Si薄膜(nc-Si/SiO2)作为基质,将稀土离子Er掺入其中所形成的nc-Si:Er3+/SiO2薄膜材料为主,介绍了nc-Si→Er3+之间的能量转移过程,探讨了实现各类掺Er的Si基纳米材料高效率发光的可能途径.这些方法主要包括:增强nc-Si→Er3+的能转移效率,提高有效Er的掺杂浓度,选择最佳的退火温度,增加Er-O发光复合体的浓度和制备新的Er掺杂Si基纳米结构等.这些方法对制备具有高发光效率的掺铒硅基纳米材料具有重要的实际意义.     

化学还原法向二氧化硅人工欧泊中填充Se

本文提出了一种新的调节人工欧泊晶体的光学带隙的方法.采用改进的溶剂蒸发法将单分散SiO2微球组装成在红外光区具有光子带隙的人工欧泊,采用化学还原法向欧泊中填充高折射率材料Se,改变其光学带隙特性.采用扫描电子显微镜(SEM)、X射线衍射和可见-近红外光谱仪(VIS-NIR)等对Se-SiO2三维光子晶体的形貌、结构和光学性能进行了观察测试.研究结果表明Se以纳米晶粒的形式均匀地包覆在SiO2微球表面,与相同晶格周期的SiO2光子晶体相比,Se-SiO2光子晶体的带隙发生明显的红移.     

Impact of high-permittivity dielectrics on speed performances and power consumption in double-gate-based CMOS circuits

The performances of double-gate (DG)-based CMOS circuits with high-κ dielectrics are analyzed in terms of inverter delay and static power consumption. We show that the use of a high-κ layer as gate dielectric degrades the short-channel immunity of DG devices and increases the power consumption, but for a gate dielectric relative permittivity κ lower than 50, the circuit performances still fill the ITRS requirements. Moreover, the use of a double gate dielectric layer (thin SiO₂ oxide and high-κ layer) not only does not degrade the circuit performances, but even ameliorates the inverter speed. Finally, the analysis of back gate misalignment in DG circuits with double gate dielectric layer illustrates that the variation of the inverter performances induced by the back gate misalignment in these high-κ-based devices is comparable with that of the conventional (SiO₂ oxide layer) structure.     

MEMS用Si台面及SiO2/Si衬底上3C-SiC的LPCVD生长

本文报道用在Si台面及热氧化SiO2衬底上3C-SiC薄膜的LPCVD生长,反应生长使用的气体为SiH4和C2H4,载气为H2,采用光学显微镜、X射线衍射（XRD）、X射线光电子能谱（XPS）、扫描电镜（SEM）、以及室温Hall测试对所生长的3C—SiC材料进行了测试与分析,结果表明在3C-SiC和SiO2之间没有明显的坑洞形成。     

An interface clusters mixture model for the structure of amorphous silicon monoxide (SiO)

The present state of research on the structure of amorphous silicon monoxide (SiO) is reviewed. The black, coal-like modification of bulk SiO is studied by a combination of diffraction, microscopy, spectroscopy, and magnetometry methods. Partial radial distribution functions of SiO are obtained by X-ray, neutron and electron diffraction. Disproportionation of SiO into Si and SiO₂ is verified. High resolution TEM gives an upper limit of less than 2 nm for the typical Si cluster size. The Si K-edge electron energy-loss near-edge structure (ELNES) data of SiO are interpreted in terms of the oxidation states Si⁴⁺ and Si⁰. X-ray photoelectron spectroscopy gives first details about possible stoichiometric inhomogeneities related to internal interfaces. The wipe-out effect in the ²⁹Si MAS NMR signal of SiO is confirmed experimentally. The new estimation of the wipe-out radius is about 1.1 nm. First-time W-band, Q-band, and X-band ESR and SQUID measurements indicate an interfacial defect structure. Frequency distributions of atomic nearest-neighbours are derived. The interface clusters mixture model (ICM model) suggested here describes the SiO structure as a disproportionation in the initial state. The model implies clusters of silicon dioxide and clusters of silicon surrounded by a sub-oxide matrix that is comparable to the well-known thin Si/SiO₂ interface and significant in the volume because of small cluster sizes.     

Physico-chemical processes in metal-oxide-semiconductor transistors with thick gate oxide during high electric field stress

A complete study of the defects created in the gate oxide and at the gate oxide/substrate interface of metal-oxide-semiconductor transistors with thick gate oxide (t_ox > 10 nm) during high electric field stress, and the mechanisms responsible for these defects creation have been given. In addition, some results of positive/negative high electric field stress with constant gate voltage of commercial n-channel power metal-oxide-semiconductor transistors with thick gate oxide of 100 nm, have been explained using this study.     

1.5–2.5 nm RTP gate oxides: process feasibility, properties and limitations

To support the international roadmaps' requirements, semiconductor manufacturers must develop new processing technologies, both to shrink the dimensions and to improve the performances of devices. As a consequence, gate oxidation must advance to the 1.5–2.5 nm range over the coming years, to support the sub-0.18 μm technologies. We present here an overview of the more critical concern regarding this gate oxide downscaling. The limitations of rapid thermal processed (RTP) gate dielectric for oxide thickness <2 nm are discussed in terms of process feasibility, oxide thickness determination and maximum gate leakage current. As a result, we show that oxides as thin as 1.2 nm can be processed with control of the film uniformity (range within 0.06 nm). However, we also demonstrate that the exponential increase of the gate leakage current for oxides <2 nm does not allow integrating such thin dielectric layers in present metal oxide semiconductor (MOS) devices (oxide thickness limit around 2.3 nm).     

BiVO4/SiO2复合材料的制备及光学性能

以Bi(NO3)3 、NH4VO3 和Na2SiO3为原料,采用沉淀法制备了BiVO4/SiO2复合材料.利用扫描电镜(SEM)、X 射线衍射(XRD)及紫外-可见光吸收测试(UV-vis)对样品的晶相组成、微观结构和紫外-可见光吸收特性进行了表征.紫外-可见光吸收光谱分析表明:BiVO4/SiO2复合材料具有较宽的紫外-可见光吸收范围,计算其光学带隙为2.39 eV.光催化降价亚甲基蓝性能测试表明:BiVO4包覆SiO2能有效提高其催化性能.     

HNTs/SiO2复合气凝胶制备及其性能研究

采用正硅酸乙酯(TEOS)为硅原,以硅烷改性的埃洛石纳米管(HNTs)为增强相,利用CO2超临界干燥技术制备具有优良力学和隔热性能的HNTs/SiO2复合气凝胶.利用傅立叶红外光谱、扫描电镜、比表面积与孔径分析仪、万能试验机和导热率测量仪等手段对HNTs改性后的表面状态、HNTs/SiO2复合气凝胶的微观形貌、孔结构、力学和导热性能进行了测试分析.结果表明:改性后的HNTs均匀分散到二氧化硅气凝胶基体中,并与SiO2纳米颗粒实现良好的结合,HNTs/SiO2复合气凝胶呈三维网络结构,当HNTs含量为15wt;时,平均孔径为10.47 nm;随着HNTs含量的增加,复合气凝胶的力学性能不断增强,同时其导热系数也不断增大,当HNTs含量为15wt;时,HNTs/SiO2复合气凝胶的抗压强度为0.85 MPa,导热系数为0.024 W/mK.     

Beyond SiO2 technology: Simulation of the impact of high-κ dielectrics on mobility

A critical challenge for the microelectronics industry is the need for higher permittivity dielectrics to replace silicon dioxide. A number of different high-κ materials have been proposed and analyzed as SiO₂ replacements in the next generation of MOSFETs. High-κ materials allow the use of a thicker gate dielectric, maintaining the gate capacitance with reduced gate leakage. However they all lead to mobility degradation due to, among other factors, the coupling of carriers to surface soft-optical (SO) phonons. A severe mobility degradation in the presence of high-κ becomes evident when comparing the vertical field dependence of mobility for a wide range of high-κ materials against SiO₂. As oxides containing Hf presently appears to be the leading high-κ contenders, we have performed a detailed analysis of Hf-based gate stacks, exploiting alternative structures and compositions. The introduction of a SiO₂ interfacial layer between the channel and the HfO₂ reduces the detrimental mobility degradation resulting from the mobility SO phonon scattering, but increases the equivalent oxide thickness (EOT) of the gate dielectric. A possible material of choice for the first commercial introduction of high-κ gate stacks is hafnium silicate (Si_xHf_1−xO₂), being thermally stable and offering a good compromise between small EOT and large electron mobility.