光致聚合物全混洗光互连全息元件的制备

采用只对红光敏感的光致聚合物全息干版通过 Ｈｅ－Ｎｅ ６３２ｎｍ激光波长两次掩膜曝光,在面积为３０ｍｍ × ６０ｍｍ的全息干版上制备出全息光学元件,并成功地用于全混洗光学互连的实验演示。全息光学元件的衍射效率为 ４０～ ５２％。     

全混洗交换Omega互连网络的光学实现

本文提出了一种由左、右全混洗和空间光开关列阵组成的等效Omega网络;成功地设计了一种实现全混洗互连的低损耗,等程的光学组合棱镜.由两块光学组合棱镜和空间光开关列阵组合成的光学系统实现了全混洗交换光学互连网络,该光学互连网络已在实验中得到了证实.     

光学全混洗网络互连函数的矩阵描述及其应用

采用自由空间光学互连技术实现的全混洗网络是数字光计算系统的基本互连网络,本文针对全混洗互连函数现有描述方法的不足,引入了描述全混洗互连函数的互连矩阵,并给出了全混洗网络互连矩阵的具体形式,为模拟或验证全混洗网络实验结果提供了理论依据。     

Designing nonuniform linear arrays to maximize mutual information for bearing estimation

Estimating the bearing of a narrowband sound source using a towed horizontal array is a common array processing problem. This paper designs nonuniform linear symmetric arrays of fixed apertures for estimating the bearing of a sound source. Specifically, the hydrophone spacings for a symmetric linear array are chosen to maximize the upper bound on the mutual information between the true bearing and the estimated bearing in spatially white noise. The arrays maximizing the mutual information while nulling the forward endfire direction look significantly different from the uniform arrays commonly used in towed systems. Arrays maximizing mutual information are helpful when bearing estimation is considered as a quantization problem to assign the source to the correct partition. The optimal partitions for the array are designed using the Lloyd algorithm with an inner product distortion metric based on maximizing the likelihood function of the observations. In these approaches, increasing the mutual information and optimizing the partitions should reduce the probability of error (P(e)) in choosing the partition containing an unknown source. Simulation results with MAP and ML estimators demonstrate that the optimum arrays and partitions proposed here have a much lower P(e) than the uniform array and uniform partitions.     

Optical Implementation of CMOS/SEED Optoelectronic Integrated Crossbar Interconnection Network

An optical implementation of CMOS/SEED optoelectronic integrated crossbar interconnection network is reported. The CMOS/SEED smart pixel arrays with O/E light windows are used as logical controlling switch nodes. High/lower modulating ratio of the output light density is about 1.4. The light beam is supplied by a 0.85 μm semiconductor laser diode. 8×2 spot arrays formed by a computer-generated phase grating are used as the pumping light beams for CMOS/SEED light modulators. High-precision 2-D optical fiber bundle arrays are used as the I/O access devices. 16×16 optical crossbar interconnection network is realized using our experimental setup. It is easy to couple with CMOS/SEED smart pixel arrays by using 2-D optical fiber bundle arrays as the I/O access devices. Compact in comparison with other optical interconnection systems.     

A module design of rearrangeable nonblocking double omega optical network using binary optics elements

Omega network plays an important role in all optical communication and optical interconnection networks. In this paper, a novel technology, which binary optics element (micro-blazed grating array) can realize perfect shuffle transform including inverse perfect shuffle and left perfect shuffle, is proposed. Moreover, by a cascade of inverse perfect shuffle and left perfect shuffle, a multistage rearrangeable nonblocking omega network can be constructed. Simultaneously, the bipartition graph algorithm (BGA) is adopted to ascertain the state of node switch in each node stage (straight or crossover connection). At last, a module of the rearrangeable nonblocking omega network which is integrated with polarizing beam-splitter, half-wave plate, micro-blazed grating array, is presented. It can accomplish the functions of 8-channel signal beams’ sorting and switching without routing conflict and blocking, and has advantages of being compact in structure, easy to integrate, efficient in performance etc. Finally, both the theoretical analysis and the experimental result show that this module proposed here may be helpful in free-space optical interconnection network and optical information processing.     

Optical Implementation of CMOS/SEED Optoelectronic Integrated Crossbar Interconnection Network

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Optical Inverse Perfect Shuffle Interconnection and Its Application to Polynomial Evaluation

An optoelectronic implementation of polynomial evaluation has been presented which uses a recirculating inverse perfect shuffle interconnection (IPS). The IPS interconnection is formed by a binary phase grating which permits a high density of interconnection; it can be utilized in a high order of polynomial evaluation processing system.     

Comparison between optical interconnection processors: folded perfect-shuffle versus three-dimensional butterfly

The differences between folded perfect shuffle and three-dimensional (3-D) multi-channel butterfly optical interconnection architectures are quantified. The three-dimensional butterfly network, in particular, is used to implement Hartley transform operation.     

一种新型的光电混合多项式求值并行处理系统

本文提出了一种新型的并行求解多项式值的光电混合数字计算系统。系统中,我们采用了一种新的自由空间互连网络:逆全混洗互连,并用一特殊的组合棱镜和向列型液晶空间光调制器配合,在光学上实现了逆全混洗互连。     

用二维光栅实现FPS互联网络

提出了一种应用二维光栅和简单的成像系统实现folded perfect shuffle(FPS)的新方法,该方法具有简单,易行的优点,实验证明,其效果良好.     

Dammann光栅在光互连中的应用

本文将Ｄａｍｍａｎｎ光栅［１，２］应用于光互连，提出了用Ｄａｍｍａｎｎ光栅实现完全混洗的方法．一个２×２的Ｄａｍｍａｎｎ光栅与一个成像透镜的组合，具有与四焦点透镜类似的成像作用．像面上，像的位置与Ｄａｍｍａｎｎ光栅的位置有关，适当选择光栅的位置可以实现不同元素数目及不同元素密度的完全混洗．本文给出了有关的理论推导及实验结果．     

Photonic switching nodes based on self electro-optic effect devices

Photonic switching nodes based on self electro-optic devices are described. These nodes are proposed for use in extended generalized shuffle networks with free space digital optical interconnections between nodes. Several experiments are described demonstrating both individual switching nodes and arrays of switching nodes operating concurrently. Node complexity, optical system complexity, and tolerance issues associated with different types of nodes are also discussed.     

洗牌型图样间联想光学神经网络模型

本文将洗牌型神经网络结构和图样间联想神经网络算法相结合,提出了一种洗牌型图样间联想神经网络(PS-IPA)模型。该模型具有极其简单、稀疏的互连权矩阵,十分适于大规模神经网络的光学实现。计算机模拟结果表明洗牌型图样间联想神经网络的稳定性和抑制噪音的能力均优于图样间联想网络IPA.本文还给出了洗牌互连的一般性原则,使网络结构得到优化,增强了洗牌型神经网络的灵活性和适应性。并采用3-洗牌和2-洗牌结合的PS-IPA对汽车牌照的字符进行识别,得到了较好的结果。     

Optical Perfect Shuffle Interconnection Using Computer-Generated Blazed Grating Array

In this paper a new type element that can implement perfect shuffle (PS) network of free spatial optical interconnection is presented. It is a microoptics array element consisting of a series of sub-blazed gratings with different spatial frequency. The array has highly efficient light energy and a very simple setup. It can realize 1-D, 2-D PS networks and their inverse transforms. Also, the array can conveniently realize microminiaturization and multilevel interconnection and other forms of interconnections.Presented at the International Commission for Optics Topical Meeting, Kyoto, 1994.     

Digital reconstruction of grating-distorted images through virtual-optics imaging systems

We develop a technique to correct the distortion generated by the presence of a grating that prevents correct imaging of a test object in an optical system. We use the design concept of virtual-optics imaging systems to implement a setup and a corresponding filter to remove the distortion. Results are presented showing the potential of the method.     

Continuous description of a grain boundary in forsterite from atomic scale simulations: the role of disclinations

We present continuous modelling at inter-atomic scale of a high-angle symmetric tilt boundary in forsterite. The model is grounded in periodic arrays of dislocation and disclination dipoles built on information gathered from discrete atomistic configurations generated by molecular dynamics simulations. The displacement, distortion (strain and rotation), curvature, dislocation and disclination density fields are determined in the boundary area using finite difference and interpolation techniques between atomic sites. The distortion fields of the O, Si and Mg sub-lattices are detailed to compare their roles in the accommodation of lattice incompatibility along the boundary. It is shown that the strain and curvature fields associated with the dislocation and disclination fields in the ‘skeleton’ O and Si sub-lattices accommodate the tilt incompatibility, whereas the elastic strain and rotation fields of the Mg sub-lattice are essentially compatible and induce stresses balancing the incompatibility stresses in the overall equilibrium.     

NATURAL CONVECTION HEAT TRANSFER AROUND MICROFIN ARRAYS

Microfin arrays with fin heights of 100 and 200 μm are fabricated, and natural convection around microfin arrays on a vertical surface is experimentally investigated. Microfins are fabricated by DRIE in a bulk silicon wafer. The array spacing investigated ranges from 30–360 μm, and the temperature difference between the wall temperature of the microfin array and the ambient temperature varies from 20–80 K. For comparison, minifin arrays with a fin height of 1 mm are also tested. The heat loss through the backside of the arrays was avoided by a symmetric design of fin arrays on the vertical surface. The convective heat transfer coefficients are measured and compared with the existing heat transfer correlation for the microfin arrays. It turns out that the heat transfer correlation for macrofin arrays is inadequate for the accurate estimation of the heat transfer rate in microscale systems. In addition, microfin and minifin arrays are also tested on a horizontal surface to examine the orientation effect at small scales.     

Copper metallization for ULSL and beyond

The investigation of copper for use as an interconnection metal in the ultra large-scale integration (ULSI) era of silicon integrated circuits has accelerated in the past several years. The obvious advantages for using copper to replace currently used Al are related to its lower resistivity (1.7 μΩ-cm vs. 2.7 μω-cm for Al) and its higher electromigration resistance (several orders of magnitude higher compared with Al). The goal of this review is to examine the properties of copper and its applicability as the interconnection metal. A comparison of electromigration behavior of various possible interconnection metal in standard “bulk” state is made. This is followed by a review of the calculations made comparing (a) the RC (resistance × capacitance) time constants of various material systems and (b) the joule heating of the interconnection materials. A comparative study of various metal systems for the application as the interconnect metal is then made. These discussions will clearly establish the superiority of copper over other metals despite certain limitations of copper. We then review the properties, both physical and chemical, and materials science of copper. The concept of using alloys of copper with a minimal sacrifice on resistivity to gain reliability is also discussed. This is followed by the review of the deposition, pattern definition and etching. passivation, need of the diffusion barrier (DB) and adhesion promoter (AP), planarization and dual damascene process using chemical mechanical planarization, and reliability. This review shows that copper will satisfy the needs of the future integrated circuits and provide high performance and reliability as long as we provide an appropriate barrier to diffusion in the underlying devices and the dielectric.