Electrical peculiarities in Al/Si/Ge/…/Ge/Si and Al/SiGe/Si structures

The current–voltage (I–V) and capacitance–voltage (C–V) behaviour of different Si/Ge multilayers and SiGe single layers prepared on p-type Si substrates by magnetron sputtering and annealing, has been studied in the temperature range of 80–320 K by using Al Schottky contacts as test structures. Although a significant influence of the microstructure of the Si/Ge multilayers and SiGe layers was obtained on the electrical behaviour of the structures, the structures exhibited similar specific features.     

Ti/Al p-GaN Schottky barrier height determined by C–V measurements

Data are presented on the rigorous method of capacitance–voltage (C–V) measurements to the barrier height of Ti/Al p-GaN Schottky junction. For a sample with Hall concentration of 5.5 × 10¹⁶/cm³ the upper limit of the modulation frequency leading the full response of the activated carriers is defined as 1.5 kHz from the capacitance versus modulation frequency (C–f) plot. The activation energy of the Mg acceptors determined from the temperature-dependent C–f plot is 0.12 eV. The barrier height estimated with this activation energy and the intercept voltage of the 1/C²–V plot drawn with the 1.5 kHz C–V data is 1.43 eV at 300 K and 1.41 eV at 500 K. This is the most reliable barrier height ever reported. A reliable room temperature C–V doping profile is demonstrated using the 1.5 KHz modulation, which is sensitive enough to resolve the presence of a 15 nm thin highly doped (8 × 10¹⁸/cm³) layer formed near the surface.     

Effect of oxide thickness on the capacitance and conductance characteristics of MOS structures

In this work, the investigation of the interface states density and series resistance from capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics in Au/SnO₂/n-Si (MOS) structures prepared at various SnO₂ layer thicknesses by spray deposition technique have been reported. It is fabricated five samples depending on deposition time. The thicknesses of SnO₂ films obtained from the measurement of the oxide capacitance in the strong accumulation region for MOS Schottky diodes are 37, 79, 274, 401, and 446 Å, for D1, D2, D3, D4, and D5 samples, respectively. The C–V and G–V measurements of Au/SnO₂/n-Si MOS structures are performed in the voltage range from −6 to +10 V and the frequency range from 500 Hz to 10 MHz at room temperature. It is observed that peaks in the forward C–V characteristics appeared because of the series resistance. It has been seen that the value of the series resistance R_s of samples D1 (47 Ω), D2 (64 Ω), D3 (98 Ω), D4 (151 Ω), and D5 (163 Ω) increases with increasing the oxide layer thickness. The interface state density D_it ranges from 2.40×10¹³ cm⁻² eV⁻¹ for D1 sample to 2.73×10¹² cm⁻² eV⁻¹ for D5 sample and increases with increasing the oxide layer thickness.     

Effects of oxygen flow rate on the properties of HfO2 layers grown by metalorganic molecular beam epitaxy

The investigations on the properties of HfO₂ dielectric layers grown by metalorganic molecular beam epitaxy were performed. Hafnium-tetra-tert-butoxide, Hf(C₄H₉O)₄ was used as a Hf precursor and pure oxygen was introduced to form an oxide layer. The grown film was characterized by X-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM), high-resolution transmission electron microscopy (HRTEM), and capacitance–voltage (C–V) and current–voltage (I–V) analyses. As an experimental variable, the O₂ flow rate was changed from 2 to 8 sccm while the other experimental conditions were fixed. The XPS spectra of Hf 4f and O 1s shifted to the higher binding energy due to the charge transfer effect and the density of trapped charges in the interfacial layer was increased as the oxygen flow rate increased. The observed microstructure indicated the HfO₂ layer was polycrystalline, and the monoclinic phases are the dominant crystal structure. From the C–V analyses, k = 14–16 and EOT = 44–52 were obtained, and the current densities of (3.2–3.3) × 10⁻³ A/cm² were measured at −1.5 V gate voltage from the I–V analyses.     

Analysis of frequency-dependent series resistance and interface states of In/SiO2/p-Si (MIS) structures

In this work, the investigation of the interface state density and series resistance from capacitance–voltage (C–V) and conductance–voltage (G/ω−V) characteristics in In/SiO₂/p-Si metal–insulator–semiconductor (MIS) structures with thin interfacial insulator layer have been reported. The thickness of SiO₂ film obtained from the measurement of the oxide capacitance corrected for series resistance in the strong accumulation region is 220 Å. The forward and reverse bias C–V and G/ω−V characteristics of MIS structures have been studied at the frequency range 30 kHz–1 MHz at room temperature. The frequency dispersion in capacitance and conductance can be interpreted in terms of the series resistance (R_s) and interface state density (D_it) values. Both the series resistance R_s and density of interface states D_it are strongly frequency-dependent and decrease with increasing frequency. The distribution profile of R_s–V gives a peak at low frequencies in the depletion region and disappears with increasing frequency. Experimental results show that the interfacial polarization contributes to the improvement of the dielectric properties of In/SiO₂/p-Si MIS structures. The interface state density value of In/SiO₂/p-Si MIS diode calculated at strong accumulation region is 1.11×10¹² eV⁻¹ cm⁻² at 1 MHz. It is found that the calculated value of D_it (≈10¹² eV⁻¹ cm⁻²) is not high enough to pin the Fermi level of the Si substrate disrupting the device operation.     

Growth and characterization of MOMBE grown HfO2

HfO₂ dielectric layers were grown directly on the p-type Si (1 0 0) by metalorganic molecular beam epitaxy (MOMBE). Hafnium tetra-butoxide was used as a Hf precursor and pure oxygen was introduced to form an oxide layer. The properties of the layers with different thicknesses were evaluated by X-ray diffraction (XRD), X-ray photoelectron spectroscopy (XPS), high-resolution transmission electron microscopy (HRTEM), and capacitance–voltage (C–V) and current–voltage (I–V) analyses. XRD and HRTEM results showed that the HfO₂ films thinner than 12 nm were amorphous while the films thicker than 12 nm began to crystallize in the tetragonal and the monoclinic phases. The XPS spectra of O 1s show that the O---Si binding energies shifted to the lower binding energy with increasing the HfO₂ layer thickness. Moreover, the snap back phenomenon is observed in accumulation capacitance. These changes are believed to be linked with the decomposition of SiO and the crystallization of HfO₂ layer during the film growth.     

Barrier height engineering of Ag/GaAs(100) Schottky contacts by a thin organic interlayer

Thin films of 3,4,9,10-perylenetetracarboxylic dianhydride (PTCDA) were used as an interlayer for the electronic modification of Ag/n-GaAs(100) Schottky contacts. The electronic properties were investigated recording in situ current–voltage (I–V) and capacitance–voltage (C–V) characteristics. For H-plasma treated substrates the effective barrier height decreases from 0.81 to 0.64 eV as a function of the PTCDA layer thickness (d_PTCDA). In the case of the sulphur passivated GaAs the effective barrier height first increases and then decreases, the overall range being 0.54–0.73 eV. The substrate treatment leads to a different alignment between the band edges of the GaAs and the molecular orbitals of the PTCDA, making it possible to determine the energy position of the LUMO transport level.     

Electrical characterization of low temperature deposited TiO2 films on strained-SiGe layers

Thin films of titanium dioxide have been deposited on strained Si_0.82Ge_0.18 epitaxial layers using titanium tetrakis-isopropoxide [TTIP, Ti(O-i-C₃H₇)₄] and oxygen by microwave plasma enhanced chemical vapor deposition (PECVD). The films have been characterized by X-ray diffraction (XRD) and Fourier transform infrared spectroscopy (FTIR). Dielectric constant, equivalent oxide thickness (EOT), interface state density (D_it), fixed oxide charge density (Q_f/q) and flat-band voltage (V_FB) of as-deposited films were found to be 13.2, 40.6 Å, 6×10¹¹ eV⁻¹ cm⁻², 3.1×10¹¹ cm⁻² and −1.4 V, respectively. The capacitance–voltage (C–V), current–voltage (I–V) characteristics and charge trapping behavior of the films under constant current stressing exhibit an excellent interface quality and high dielectric reliability making the films suitable for microelectronic applications.     

The dependence of I–V and C–V characteristics on temperature in the H-terminated Pb/p-Si(1 0 0) Schottky barrier diodes

The current–voltage (I–V) and capacitance–voltage (C–V) characteristics of H-terminated Pb/p-Si/Al contacts fabricated by us have been measured in the temperature range of 77–300 K. The experimental values of the barrier height (BH) Φ_bo and the ideality factor n for the device range from 0.674 and 1.072 eV (at 300 K) to 0.352 and 2.452 eV (at 77 K), respectively. The ideality factors become larger with lowering temperature while the barrier height decreases. The Φ_bo(n) plot shows a linear dependence in the temperature range of 77–300 K that can be explained by the barrier inhomogeneity at the metal/semiconductor interface. The extrapolation of the linear Φ_bo(n) plot to n = 1 has given a homogeneous barrier height of approximately 0.713 eV for the Pb/p-Si(1 0 0) contact. A Φ_bo versus 1/T plot was drawn to obtain evidence of a Gaussian distribution of the BHs, and values of and σ_s = 80.5 mV for the mean BH and zero-bias standard deviation have been obtained from this plot, respectively. Then, a modified versus 1/T plot gives and A^* as 0.828 eV and 54.89 A/cm² K², respectively. Furthermore, an average value of −0.687 meV/K for the temperature coefficient has been obtained, the value of −0.687 meV/K for hydrogen terminated p-type Si differs from those given for p-type Si without hydrogen termination in the literature.     

Photoluminescence and capacitance–voltage characterization of GaAs surface passivated by an ultrathin GaN interface control layer

A novel surface passivation technique for GaAs using an ultrathin GaN interface control layer (GaN ICL) formed by surface nitridation was characterized by ultrahigh vacuum (UHV) photoluminescence (PL) and capacitance–voltage (C–V) measurements. The PL quantum efficiency was dramatically enhanced after being passivated by the GaN ICL structure, reaching as high as 30 times of the initial clean GaAs surface. Further analysis of PL data was done by the PL surface state spectroscopy (PLS³) simulation technique. PL and C–V results are in good agreement indicating that ultrathin GaN ICL reduces the gap states and unpins the Fermi level, realizing a wide movement of Fermi level within the midgap region and reduction of the effective surface recombination velocity by a factor of 1/60. GaN layer also introduced a large negative surface fixed charge of about 10¹² cm⁻². A further improvement took place by depositing a Si₃N₄ layer on GaN ICL/GaAs structure.     

Gated photoluminescence study of oxide-free InP MIS structure having an ultrathin silicon interface control layer

In order to investigate the effectiveness of a novel oxide-free surface passivation approach for InP, using an ultrathin silicon interface control layer (Si ICL), gated photoluminescence characteristics of the Si₃N₄/Si ICL/n-InP metal–semiconductor–insulator (MIS) structure were studied at room temperature. As compared with gated PL spectra of Si₃N₄/n-InP MIS without Si ICL, PL intensities of the sample with Si ICL were much more strongly modulated by the gate voltage. The interface state density distribution was estimated by an optical analog of the Terman’s C–V analysis and a good agreement with the C–V analysis was obtained. The result indicates complete removal of Fermi level pinning over the entire bandgap in the novel oxide-free MIS structure.     

The fabrication and characterization of ZnO UV detector

ZnO films were deposited on GaAs substrates by radio frequency (rf) magnetron sputtering followed by an ambient-controlled heat treatment process for arsenic doping. In Hall measurements, the As-doped ZnO films showed the characteristics of p-type semiconductor. The ZnO thin film p–n homojuctions were then fabricated to investigate the electrical properties of the films. The p–n homojunctions exhibited the distinct rectifying current–voltage (I–V) characteristics. The turn-on voltage was measured to be 3.0 V under the forward bias. When ultraviolet (UV) light (λ = 325 nm) was irradiated on the p–n homojunction, photocurrent of 2 mA was detected. Based on these results, it is proposed that the p–n homojunction herein is a potential candidate for UV photodetector and optical devices.     

Fixed charge and interface traps at heterovalent interfaces between Si(1 0 0) and non-crystalline Al2O3–Ta2O5 alloys

Characterization by Auger electron spectroscopy (AES) and Fourier transformation infrared spectroscopy (FTIR) confirms (Ta₂O₅)_x(Al₂O₃)_1−x alloys are homogeneous pseudo-binary alloys with increased thermal stability with respect to end member oxides, Ta₂O₅ and Al₂O₃. Capacitance–voltage (C–V) and current density–voltage (J–V) data as a function of temperate show that the Ta d-states of the alloys act as localized electron traps, and are at an energy approximately equal to the conduction band offset of Ta₂O₅ with respect to Si.     

Characterization of metal/GaN Schottky interfaces based on I–V–T characteristics

Interface properties of metal/n- and p-GaN Schottky diodes are studied by I–V–T and C–V–T measurements, and simulation of their characteristics. On the basis of the previously proposed “surface patch” model, the gross behavior of I–V–T characteristics, which includes Richardson plots together with temperature dependence of the effective Schottky barrier heights (SBHs) and n-values, can be well reproduced. Furthermore, the dependence of the true SBH on the metal work function was also deduced from high-temperature I–V curves, giving S-values of 0.28 and 0.20 for n- and p-GaN samples, respectively, and the interface Fermi level tends to be pinned at a characteristic energy of about two-third of the bandgap.     

Direct measurement of electron transport features in cytochrome c via V–I characteristics of STM currents

The morphology of and electron tunneling through single and cluster cytochrome c molecules deposited on self-assembled dodecanthiol monolayer film on a gold substrate have been studied experimentally using scanning tunneling microscopy (STM) and scanning tunneling spectroscopy. STM images of a single cytochrome c molecule revealed a globular structure with a diameter of 4 nm and height of 1.5 nm. A spectroscopic study obtained by recording tunneling current–bias voltage (V–I) curves revealed that the STM current increases stepwise at asymmetric threshold sample bias voltages of +100 mV and –200 mV.     

Reduction of the concentration of slow insulator states in SiO2/InP-MIS structures

The well-known drift phenomena usually found in the InP-metal-insulator-semiconductor (MIS) devices can be explained by the assumption of a spatial and energetical distribution of slow states located within the insulator. The concentration of these states can be reduced by far more than one order of magnitude if a suitable technique of insulator deposition is applied. In this paper we will discuss the influence of the deposition temperature, the spatial separation of sample and plasma (“indirect plasma method”), and the addition of phosphorus into the reaction chamber during the initial period of insulator deposition on the properties of n-type and p-type InP-MIS capacitors. Plasma-enhanced chemical vapor deposited silicon dioxide is used as insulator. The samples were characterized by means of capacitance/voltage (C(V)) and deep level transient spectroscopy (DLTS) measurements. Only minor hysteresis of the C(V) curves and concentrations of slow insulator states of only (1–2)×10¹¹ cm^-2 eV^-1 are measured for the best of our samples.     

Determination of localized states in porous silicon

We determined the density of state distribution near the Fermi level in porous silicon from the analysis of the current–voltage (J–V) and the current–thickness (J–T) characteristics in the space-charge-limited-current (SCLC) regime. The distribution exhibits a minimum density at the Fermi level, which is similar to the U-shape-trap-distribution observed in crystalline Si–SiO₂ interface or in amorphous Si. Theoretical analysis well explains both the J–V and the J–L characteristics, which implies that the current flow is entirely controlled by localized states situated at the quasi-Fermi level.     

On the barrier inhomogeneities of polyaniline/p-Si/Al structure at low temperature

The current–voltage (I–V) characteristics of Au/polyaniline(PANI)/p-Si/Al structures were determined at various temperatures in the range of 90–300 K. The evaluation of the experimental I–V data reveals a decrease of the zero-bias barrier height (BH) and an increase of the ideality factor (n) with decreasing temperature. It was shown that the occurrence of a Gaussian distribution of then BHs is responsible for the decrease of the apparent BH, increase of the ideality factor n due to barrier height imhomogeneities that prevail at the interface. A Φ_b0 versus 1/T plot has been drawn for evidence of the Gaussian distribution of the barrier height, and and σ₀ = 0.0943 V for the mean barrier height and zero-bias standard deviation, respectively, have been obtained from this plot. Thus, a modified versus 1/T plot gives and A^* as 0.885 eV and A^* = 55.80 A/K² cm², respectively. Hence, it can be concluded that Au/PANI/p-Si/Al structure has a good rectifying contact and the temperature dependence of I–V characteristics of the rectifying contact on p-Si successfully have been explained on the basis of TE mechanism with Gaussian distribution of the barrier heights.     

Thin layers of GaInP, GaP and GaAsP in metalorganic vapour phase epitaxy-grown resonant tunnelling diodes

We have studied the epitaxial growth and electrical performance of Al-free, GaAs-based, resonant tunnelling diodes (RTDs) including thin barriers of GaInP, GaP, or GaAs_xP_1−x. n-Type tunnelling diodes have been fabricated and the symmetry in the current–voltage (I–V) characteristics, as well as the peak-to-valley ratios, are found to be sensitive probes for the interface quality in the heterostructures. For GaInP RTDs, we show that the introduction of GaP intermediate layers is crucial for the realisation of a useful tunnelling current. RTDs including thin barriers (less than about 10 monolayers (ML)) of GaP are realised, but the strong mismatch between the materials limit the useful thickness. Finally, RTDs with GaAs_xP_1−x alloys are fabricated showing the best peak-to-valley ratio of the diodes (about 5), as well as a symmetric I–V characteristics. The electrical data are further compared to studies by transmission electron microscopy (TEM) in the various material systems.     

The effects of the ageing on the characteristic parameters of polyaniline/p-type Si/Al structure

A detailed study of the effects of the ageing on the characteristic parameters of polyaniline/p-type Si/Al structure has been presented. The polyaniline film has been formed on a p-type Si substrate by means of an anodization process. The polyaniline/p-Si/Al structure has demonstrated clearly rectifying behavior by the current–voltage (I–V) curves studied at room temperature. The current–voltage curves of the structure have been measured immediately, 15, 30, 60, 90 and 120 days after fabrication of the polyaniline/p-Si/Al structure. It has been seen that the characteristic parameters, such as barrier height (BH), ideality factor and series resistance of polyaniline/p-type Si/Al structure have slowly changed with increasing ageing time. The diode shows non-ideal I–V behavior with an ideality factor greater than unity that can be ascribed to the interfacial layer, the interface states and the series resistance.