Low voltage CMOS fully differential current feedback amplifier with controllable 3-dB bandwidth

This paper presents a CMOS fully differential current feedback operational amplifier with controllable 3-dB bandwidth. The FDCFOA has the advantage of a wide range controllable 3-dB bandwidth (∼57–500 MHz) without changing the feedback resistance. The FDCFOA has a standby current of 320 μA. Application of the proposed FDCFOA in realizing second order low-pass filter with controllable 3-dB bandwidth is given. PSpice simulations of the FDCFOA block and its application are given using 0.25 μm CMOS technology from MOSIS and dual supply voltages ±0.75 V.     

A new low voltage level-shifted FVF current mirror with enhanced bandwidth and output resistance

This paper proposes a new high-performance level-shifted flipped voltage follower (LSFVF) based low-voltage current mirror (CM). The proposed CM utilises the low-supply voltage and low-input resistance characteristics of a flipped voltage follower (FVF) CM. In the proposed CM, level-shifting configuration is used to obtain a wide operating current range and resistive compensation technique is employed to increase the operating bandwidth. The peaking in frequency response is reduced by using an additional large MOSFET. Moreover, a very high output resistance (in GΩ range) along with low-current transfer error is achieved through super-cascode configuration for a wide current range (0–440 µA). Small signal analysis is carried out to show the improvements achieved at each step. The proposed CM is simulated by Mentor Graphics Eldospice in TSMC 0.18 µm CMOS, BSIM3 and Level 53 technology. In the proposed CM, a bandwidth of 6.1799 GHz, 1% settling time of 0.719 ns, input and output resistances of 21.43 Ω and 1.14 GΩ, respectively, are obtained with a single supply voltage of 1 V. The layout of the proposed CM has been designed and post-layout simulation results have been shown. The post-layout simulation results for Monte Carlo and temperature analysis have also been included to show the reliability of the CM against the variations in process parameters and temperature changes.     

Symbolic analysis of analog circuits containing voltage mirrors and current mirrors

The pathological elements voltage mirror (VM) and current mirror (CM) have shown advantages in analog behavioral modeling and circuit synthesis, where many nullor-mirror equivalences have been explored to design and to transform voltage-mode circuits to current-mode ones and viceversa. However, both the VM and CM have not equivalents to perform automatic symbolic circuit analysis. In this manner, we introduce nullor-equivalents for these pathological elements allowing to include parasitics and to perform only symbolic nodal analysis. The nullor-equivalent of the CM is extended to provide multiple-outpus (MO-CM). Finally, two active filters containing VMs, CMs and MO-CMs are analysed to show the usefulness of the models.     

Low voltage,high CMRR,and wide bandwidth novel current mode current controlled instrumentation amplifier

In this paper, a new current controlled instrumentation amplifier structure is proposed. The introduced circuit uses three current controlled conveyors and a single grounded resistor. This structure offers several enhanced advantages in comparison with other current and voltage modes instrumentation amplifiers. It provides attractive features such as: wide bandwidth independent to the differential gain, current tuned gain, high common mode rejection ratio without requiring matched resistors and low supply voltage equal to ±0.75 V. Accordingly, the proposed amplifier is a suitable element for integrated circuit implementation in the medical field. The used second-generation current controlled conveyor has a very simple structure. It is generally constituted of two NPN and seven CMOS transistors and it has numerous interesting characteristics. Theoretical analysis is carried out taking into consideration the non-ideality parameters of the conveyors. The circuit features are corroborated via a PSPICE simulation; the results are also compared to those of the previous structures presented in the literature.     

Constant bandwidth voltage amplification using current conveyors

Traditional feedback voltage amplifier formulations suffer from the restriction of a constant gain-bandwidth product, reducing the bandwidth dramatically at higher gains. A feedback voltage amplifier designed around a current conveyor or current amplifier completely overcomes this restriction and permits maximum bandwidth to be obtained for all values of gain.     

Power voltage current convertor using quasi complementary MOSFET current mirrors

A voltage current convertor is described having a quasi complementary class AB architecture that is particularly suited to implementation using discrete power MOSFETs. High-voltage mirror designs are presented, enabling the construction of sources with kilovolt compliance range, tens of watts of output power and greater than 100 kHz bandwidth. GΩ output impedance and distortion below 1% can be obtained with no trimming or transistor matching.     

A new flipped voltage follower with enhanced bandwidth and low output impedance

The paper proposes a flipped voltage follower (FVF) cell with wider bandwidth and lower output impedance as compared to the conventional FVF. These improvements are obtained by adding a resistance in the feedback path of conventional FVF. A current mirror is implemented by using proposed FVF cell to verify the performance improvement. The circuits are designed in TSMC 0.18-µm CMOS technology with 1.5 V supply voltage. The simulation results show that bandwidth extension ratio (BWER) of newly developed FVF is 1.4 without peaking and 1.7 with peaking. The BWERs of the passive-compensated current mirror implemented by using proposed FVF cell are 1.28 without peaking and 1.58 with peaking in the frequency response.     

Low voltage built-in current sensor

A low voltage built-in current sensor (BICS) for I_DDQ testing based on the bulk-driven current mirror technique is proposed. This design has a small overhead in terms of area and needs only one external power supply. Different current resolution requirements can be met by adjusting the aspect ratio of the transistors in the design. HSPICE simulation results show that high error detection speed and small performance impact on the original circuit are also achieved     

A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability

This brief describes an adaptive bandwidth bus architecture based on hybrid current/voltage mode repeaters for long global RC interconnect static busses that achieves high-data rates while minimizing the static power dissipation associated with current-mode (CM) signaling. An experimental adaptive bandwidth bus test chip fabricated in AMI 1.6-/spl mu/m Bulk CMOS indicates a reduction in power dissipation of approximately 62% over CM sensing and an increase in maximum data rate of 40% over voltage-mode signaling.     

Low supply voltage high-performance CMOS current mirror with low input and output voltage requirements

This paper presents a scheme for the efficient implementation of a low supply voltage continuous-time high-performance CMOS current mirror with low input and output voltage requirements. This circuit combines a shunt input feedback and a regulated cascode output stage to achieve low input resistance and very high output resistance. It can be used as a high-precision current mirror in analog and mixed signal circuits with a power supply close to a transistor's threshold voltage. The proposed current mirror has been simulated and a bandwidth of 40 MHz has been obtained. An experimental chip prototype has been sent for fabrication and has been experimentally verified, obtaining 0.15-V input-output voltage requirements, 100-/spl Omega/ input resistance, and more than 200-M/spl Omega/ (G/spl Omega/ ideally) output resistance with a 1.2-V supply in a standard CMOS technology.     

Low power high output impedance high bandwidth QFGMOS current mirror

Current mirror is a basic block of any mixed-signal circuit for example in an analog-to-digital converter. Its precise performance is the key requirement for analog circuits where offset is a measure issue. The key parameter which defines the performance of current mirror is its input/output impedance, input swing, and bandwidth. In this paper, a low power design of current mirror using quasi-floating gate MOS transistor is presented. The proposed current mirror boosts its output impedance in range of giga-ohm through use of regulated cascode structure followed by super-cascode. Another improvement is done in reduced input compliance voltage limits with the help of level shifter. The proposed current mirror operates well for input current range 0–700 $\mathrm{\mu }A$ with an input and output impedance of 160 $\Omega$ and 8.55 $\mathrm{G}\Omega$ respectively and high bandwidth of 4.05 $\mathrm{GHz}$. The total power consumption of the proposed current mirror is about 0.84 mW. The low power consumption with enhanced output impedance and bandwidth suits proposed current mirror for various high-speed analog designs. Performance of the presented current mirror circuit is verified using HSpice simulations on 0.18 $\mathrm{\mu }m$ mixed-mode twill-well technology at a supply voltage of ±0.5 V.     

低电压大电流变换器电路技术

介绍抽头电感器方式降压型变换器、推娩式正向变换器和两段式DC/DC变换器所采用的电路技术。     

低压直流供电电路中高压直流的产生

在由低压直流电源供电的电路中,往往电路的某些部位需要使用高于电源所供的电压,将电源所供的低压转换为较高的电压,常用的方法有3种:自举升压、电感升压、逆变升压。结合实际应用电路对各种升压方法从器件选择、升压原理、升压结果等诸方面进行分析、探讨,解决了总体供电电压不变时,局部高压产生的关键性问题。它对电子电器电路的设计人员有一定的启发作用,对优化电路、遴选器件有较强的参考价值。     

Low voltage low power CMOS current differencing buffered amplifier

The major goal of this work is to present a new CMOS realization for the current differencing buffered amplifier (CDBA). A design technique based on flipped voltage follower current sources is preferred to obtain a high performance CDBA. The proposed circuit can operate with the minimum supply voltages of ±0.6 V. It also consumes less power than its counterparts that have been reported so far. Moreover, the proposed CDBA has good voltage and current gain accuracies. For the simulations, UMC 0.18 μm CMOS process is used. The performance of the CDBA is verified with HSPICE. Finally, a second-order, allpass/notch filter configuration is proposed to show the performance and usefulness of the circuit. The results from HSPICE simulations are in remarkable agreement with the expected ones.     

仿真电流镜输入偏置电流的方法

仿真电流镜的输出偏置电流是很简单的.您只需加上输入电流和测量输出电流,再计算它们的差就行了.然而,输出偏置电流不等于输入偏置电流,尤其当电路不是1:1电流镜时.高度精确地仿真输入偏置电流是比较复杂的.假设您正在处理1:1电流镜,并且想知道需要什么样的输入电流来得到10μA输出电流.在理想情况下,假如输入偏置电流为零,则输入电流是10μA.然而,由于双极晶体管的β值有限、输出阻抗有限以及失配等原因,输入偏置电流不等于零.图1所示设计,仿真精度高,仿真时间短.     

Small periodicity FSS screens with enhanced bandwidth performance

A novel approach for obtaining small periodicity frequency selective surface (FSS) screens with enhanced bandwidth performance is proposed. The issue of miniaturising FSS unit cells has gained extreme importance in recent metamaterials applications. To this end several procedures have been suggested in the literature. However, such procedures usually result in a bandwidth degradation as long as miniaturisation is improved. On the contrary, the bandwidth performance of the structures here presented is enhanced as the FSS periodicity gets smaller. Application of such structures to the synthesis of artificial magnetic conductors are also presented.     

Dual-band planar quadrature hybrid with enhanced bandwidth response

This paper presents the theory, design procedure, and implementation of a dual-band planar quadrature hybrid with enhanced bandwidth. The topology of the circuit is a three-branch-line (3-BL) quadrature hybrid, which provides much larger flexibility to allocate the desired operating frequencies and necessary bandwidths than other previously published configurations. A performance comparison with other dual-band planar topologies is presented. Finally, a 3-BL quadrature hybrid for dual band (2.4 and 5 GHz) wireless local area network systems was fabricated, aimed to cover the bands corresponding to the standards IEEE802.11a/b. The measurements show a 16% and 18% bandwidth for the lower and upper frequency, respectively, satisfying and exceeding the bandwidth requirements for the above standards.     

Very accurate dynamic current mirrors

A highly accurate current mirror based on dynamic analogue techniques has been integrated and measured. This principle is insensitive to transistor mismatch and allows the reproduction of input current in any desired integer ratio, at the output.<>     

Ultra low-voltage CMOS current mirrors

In this paper we present an ultra low-voltage bidirectional and continuous time current mirror based on clocked semi-floating-gate transistors. The current mirror may be used with supply voltages down to 250 mV and frequencies up to several hundred MHz. The simulated data presented are obtained using the Spectre simulator provided by Cadence and valid for a 90 nm TSMC CMOS process.     

Gain programmable current mirrors based on current steering

A new and compact scheme for a programmable current mirror is introduced. It features linear gain continuously adjustable in a wide range. In such a scheme differential pairs are used as current steering elements in order to provide gain programmability. All mirror transistors operate in strong inversion. Implementation of a linear OTA/multiplier is discussed. Experimental verification of the proposed scheme is provided.