Large format two-color CMOS ROIC for SLS detectors

The ISC0905 is a 640 × 512, large format, two-color CMOS readout integrated circuit (ROIC) designed for strained-layer superlattice (SLS) detectors. The detector interface is supported through one input pad in each 30 μm pixel. One bit in the serial control word programs the chip to automatically adjust all biases and timing to allow for the integration of either electrons or holes. This feature allows users to easily operate this ROIC with a wide variety of p-on-n or n-on-p detectors. The ROIC has been specifically designed to allow for both polarities of detectors to be placed back-to-back and to connect to the ROIC through a single input pad to obtain a two-color image. The two-color image is achieved by switching the ROIC mode between the two colors on a per frame basis. This paper will describe the interface, design and features of the ISC0905 ROIC as well as a summary of the characterization test results.     

C-QWIP focal plane arrays

We have been developing corrugated quantum well infrared photodetector (C-QWIP) technology for long wavelength applications. A number of large format 1024 × 1024 C-QWIP focal plane arrays (FPAs) have been demonstrated. In this paper, we will provide a detailed analysis on the FPA performance in terms of quantum efficiency η and compare it with a detector model. We found excellent agreement between theory and experiment when both the material parameters and the pixel geometry were taken into account. By changing the number of quantum wells, doping density, spectral bandwidth and pixel size, a range of η from 13% to 37% was obtained. This range of η, combined with the wide spectral width, enables C-QWIPs to be operated at a high speed. For example, model analysis shows that a C-QWIP FPA with 10.7 μm cutoff and 25 μm pitch will have a thermal sensitivity of 16 mK at 2 ms integration time with f/2 optics in the presence of 900 readout noise electrons.     

A buffer direct injection and direct injection readout circuit with mode selection design for infrared focal plane arrays

This paper proposes a solution to the excessive area penalty associated with traditional buffer direct injection (BDI) for single pixel. The proposed solution reduces the area and power consumption of BDI to combine the direct injection (DI) within a shared architecture, while a dual-mode readout circuit expands the functionality and performance of the array readout circuit of infrared sensor. An experimental array of 10 × 8 readout circuits was fabricated using TSMC 2P4M 0.35 μm 5 V technology. Measurements were obtained using a main clock with a frequency of 3 MHz and power consumption of 9.94 mW. The minimum input current was 119 pA in BDI and 1.85 pA in DI. The signal swing was 2 V, the root mean square noise voltage was 1.84 mV, and the signal-to-noise ratio was 60 dB. This approach is applicable to mid- and long-band sensors to increase injection efficiency and resolution.     

Modulation transfer function of QWIP and superlattice focal plane arrays

Modulation transfer function (MTF) is the ability of an imaging system to faithfully image a given object. The MTF of an imaging system quantifies the ability of the system to resolve or transfer spatial frequencies. In this paper we will discuss the detail MTF measurements of a 1024 × 1024 pixel multi-band quantum well infrared photodetector and 320 × 256 pixel long-wavelength InAs/GaSb superlattice infrared focal plane arrays.     

Digital readout integrated circuit (DROIC) implementing time delay and integration (TDI) for scanning type infrared focal plane arrays (IRFPAs)

This paper presents a digital readout integrated circuit (DROIC) implementing time delay and integration (TDI) for scanning type infrared focal plane arrays (IRFPAs) with a charge handling capacity of 44.8 Me⁻ while achieving quantization noise of 198 e⁻ and power consumption of 14.35 mW. Conventional pulse frequency modulation (PFM) method is supported by a single slope ramp ADC technique to have a very low quantization noise together with a low power consumption. The proposed digital TDI ROIC converts the photocurrent into digital domain in two phases; in the first phase, most significant bits (MSBs) are generated by the conventional PFM technique in the charge domain, while in the second phase least significant bits (LSBs) are generated by a single slope ramp ADC in the time domain. A 90 × 8 prototype has been fabricated and verified, showing a significantly improved signal-to-noise ratio (SNR) of 51 dB for low illumination levels (280,000 collected electrons), which is attributed to the TDI implementation method and very low quantization noise due to the single slope ADC implemented for LSBs. Proposed digital TDI ROIC proves the benefit of digital readouts for scanning arrays enabling smaller pixel pitches, better SNR for the low illumination levels and lower power consumption compared to analog TDI readouts for scanning arrays.     

A new digital readout integrated circuit (DROIC) with pixel parallel A/D conversion and reduced quantization noise

This paper represents a novel digital readout for infrared focal plane arrays with 2.33 Ge⁻ charge handling capacity while achieving quantization noise of 161 e⁻. Pixel level A/D conversion has been realized by pulse frequency modulation (PFM) technique supported with a novel method utilizing extended integration that eliminates the requirement for an additional column ADC. Digital pixel operates with two phases; the first phase is as ordinary PFM in charge domain and the second phase is in time domain, allowing the fine quantization and low quantization noise. A 32 × 32 prototype has been manufactured and tested. Measured peak SNR at half well fill is 71 dB with significant SNR improvement for low illuminated pixels due to extremely low quantization noise. 32 × 32 ROIC dissipates only 1.1 mW and the figure of merit for power dissipation is measured to be 465 fJ/LSB, compared to 930 fJ/LSB and 1470 fJ/LSB of the state of the art.     

A new readout integrated circuit for long-wavelength IR FPA

In the present paper, design of a readout integrated circuit (ROIC) for hybrid matrix IR FPA is presented. The design solution involves a ROIC matrix formed by 2 × 2-element fragments (cells) in which all the four cell elements, connected to one common read line, share a common integrating capacity. It is shown that, with the proposed ROIC structure: (i) the ROIC charge capacitance can be increased by a factor of 6–10, thus enabling two–three-fold enhanced NETD value of hybrid far-IR FPAs; (ii) the total number of read lines in IR FPAs can be decreased twice compared to traditional IR FPA designs, thus facilitating, due to doubly increased line spacing, the design of photosignal preprocessing system integrated with ROIC; (iii) improved structural arrangement of adaptive photosignal preprocessing system can be proposed.     

A 1k-pixel CTIA readout multiplexer for far-IR photodetector arrays

SB349 is the first 32 × 32 CTIA readout multiplexer specifically designed for far-IR photodetectors and is operable at cryogenic temperatures at least as low as 1.7 K. Four of these readouts can be butted together to form a 64 × 64 mosaic array. The array is multiplexed into eight parallel outputs and features eight selectable gain settings to accommodate various background levels, auto-zero for better input uniformity, and sample-and-hold circuitry. A special, 2-micron cryo-CMOS process was adopted to prevent freeze out and ensure low noise and proper operation at deep cryogenic temperatures. The read noise of the bare device at 4.2 K and under nominal sampling conditions was measured to be about 250e^? for the 106fF signal capacitor with the well capacity of 400ke^?. Hybridized to a typical germanium detector, the array should achieve NEP levels in the low 10^–18 W/√Hz. An overview of the design and the latest results of the test and characterization of this device are reported in this paper.     

Readout circuit with dual switching mode design for infrared focal plane arrays

The paper proposes a readout circuit architecture with adjustable integration time for dual-band infrared detectors. The readout circuit uses direct injection to be combined with a capacitive trans-impedance amplifier. The amplifier is sharing between two pixels to reduce the complexity of the readout circuit. The proposed device reduces power consumption and area overhead compared to traditional structures. An experimental chip was fabricated using the TSMC 0.35 μm 2P4 M 5 V process. The resulting unit pixel layout area is 40 μm × 40 μm with input photocurrent ranging from 0.11 pA to 50 nA. CTIA mode is applicable from 0.11 pA to 10 nA, while DI mode is applicable from 3.3 pA to 50 nA. The maximum operating frequency of the chip are 4 MHz. The CTIA output swing is 1.2 V, the DI output swing is 2 V. The signal to noise ratio of the readout circuit is 65 dB and power consumption is less than 9.6 mW.     

Modeling and deformation analyzing of InSb focal plane arrays detector under thermal shock

A higher fracture probability appearing in indium antimonide (InSb) infrared focal plane arrays (IRFPAs) subjected to the thermal shock test, restricts its final yield. In light of the proposed equivalent method, where a 32 × 32 array is employed to replace the real 128 × 128 array, a three-dimensional modeling of InSb IRFPAs is developed to explore its deformation rules. To research the damage degree to the mechanical properties of InSb chip from the back surface thinning process, the elastic modulus of InSb chip along the normal direction is lessened. Simulation results show when the out-of-plane elastic modulus of InSb chip is set with 30% of its Young’s modulus, the simulated Z-components of strain distribution agrees well with the top surface deformation features in 128 × 128 InSb IRFPAs fracture photographs, especially with the crack origination sites, the crack distribution and the global square checkerboard buckling pattern. Thus the Z-components of strain are selected to explore the deformation rules in the layered structure of InSb IRFPAs. Analyzing results show the top surface deformation of InSb IRFPAs originates from the thermal mismatch between the silicon readout integrated circuits (ROIC) and the intermediate layer above, made up of the alternating indium bump array and the reticular underfill. After passing through both the intermediate layer and the InSb chip, the deformation amplitude is reduced firstly from 2.23 μm to 0.24 μm, finally to 0.09 μm. Finally, von Mises stress criterion is employed to explain the causes that cracks always appear in the InSb chip.     

1/f Noise QWIPs and nBn detectors

The low-frequency noise is a ubiquitous phenomenon and the spectral power density of this fluctuation process is inversely proportional to the frequency of the signal. We have measured the 1/f noise of a 640 × 512 pixel quantum well infrared photodetector (QWIP) focal plane array (FPA) with 6.2 μm peak wavelength. Our experimental observations show that this QWIP FPA’s 1/f noise corner frequency is about 0.1 mHz. With this kind of low frequency stability, QWIPs could unveil a new class of infrared applications that have never been imagined before. Furthermore, we present the results from a similar 1/f noise measurement of bulk InAsSb absorber (lattice matched to GaSb substrate) nBn detector array with 4.0 μm cutoff wavelength.     

Evolution of array format of longwave infrared Type-II SLS FPAs with high quantum efficiency

In the remarkably short span of 2 years, longwave infrared focal plane arrays (FPAs) of Type-II InAs/GaSb strained layer superlattice (SLS) photodiodes have advanced from 320 × 256 format to 1024 × 1024 format while simultaneously shrinking the pitch from 30 μm to 18 μm. Despite a dark current that is presently higher than state-of-the-art mercury cadmium telluride photodiodes with the same ∼10 μm cutoff wavelength, the high pixel operability and high (∼50%) quantum efficiency of SLS FPAs enable excellent imagery with temporal noise equivalent temperature difference better than 30 mK with F/4 optics, integration time less than 1 ms, and operating temperature of 77 K or colder. We present current FPA performance of this promising sensor technology.     

Enhanced quantum well infrared photodetector focal plane arrays for space applications

A 30 months European Space Agency project started in March 2008, whose overall purpose is to expand and assess the performance of broadband (11–15 μm) quantum detectors for spectro-imaging applications: Dispersive Spectrometers and Fourier Transform Spectrometers. We present here the technical requirements, the development approach chosen as well as preliminary experimental results. Our approach is fully compatible with the final array format (1024 × 256, pitch 50–60 μm). We expect the requested uniformity, operability and SNR levels to be achieved at temperatures close to the goal values. The performance level will be demonstrated on 256 × 256, 50 μm pitch arrays. Also, operability and uniformity issues will be addressed on large mechanical 1024 × 256 hybrid arrays.     

Performance of mid-wave T2SL detectors with heterojunction barriers

A heterojunction T2SL barrier detector which effectively blocks majority carrier leakage over the pn-junction was designed and fabricated for the mid-wave infrared (MWIR) atmospheric transmission window. The layers in the barrier region comprised AlSb, GaSb and InAs, and the thicknesses were selected by using k · P-based energy band modeling to achieve maximum valence band offset, while maintaining close to zero conduction band discontinuity in a way similar to the work of Abdollahi Pour et al. [1] The barrier-structure has a 50% cutoff at 4.75 μm and 40% quantum efficiency and shows a dark current density of 6 × 10⁻⁶ A/cm² at −0.05 V bias and 120 K. This is one order of magnitude lower than for comparable T2SL-structures without the barrier. Further improvement of the (non-surface related) bulk dark current can be expected with optimized doping of the absorber and barrier, and by fine tuning of the barrier layer design. We discuss the effect of barrier doping on dark current based on simulations. A T2SL focal plane array with 320 × 256 pixels, 30 μm pitch and 90% fill factor was processed in house using a conventional homojunction p–i–n photodiode architecture and the ISC9705 readout circuit. High-quality imaging up to 110 K was demonstrated with the substrate fully removed.     

A low noise 2 × 16 Ge:Sb focal-plane array: Paving the way for large format FPAs for far IR astronomy

Future astronomical instruments call for large format and high sensitivity far infrared focal-plane arrays to meet their science objectives. Arrays as large as 128 × 128 with sensitivities equal to or better than 10⁻¹⁸ W/√Hz are set as targets for the far IR instruments to be developed within the next 10 years. These seemingly modest goals present a not-so-modest quantum leap for far IR detector technology whose progress is hampered by a number of complexities; chief among them the development of low noise readouts operating at deep cryogenic temperatures and a viable hybridization scheme suitable for far IR detectors. In an effort to incrementally develop large-format photoconductor arrays, we have fabricated a 2 × 16 Ge:Sb array using the SBRC190 readout – a cryogenic 1 × 32 CTIA readout multiplexer initially developed for SOFIA’s AIRES instrument. In this paper we report the results of the extensive parametric tests performed on this array showing an impressive noise performance of 2.2 × 10⁻¹⁸ W/√Hz and a DQE of 0.41 despite some design limitations. With such an encouraging performance, this prototype array will serve as a platform for our future developmental effort.     

High-speed CMOS readout integrated circuit for large-scale and high-resolution microbolometer array

A new CMOS readout integrated circuit (ROIC) for microbolometric focal plane array (FPA) is proposed in this paper. By applying multiple-module parallel working technique, the pixel readout speed of the CMOS ROIC can reach 10 MHz, which is very suitable for large-scale microbolometer array. The CMOS ROIC of each parallel working module consists of three major parts: direct injection (DI) input circuits, column-shared integrating circuits, and common noise-suppressing circuits. The readout structure of the ROIC is simple because of the DI input, shared and common circuits, and this makes the ROIC satisfy the requirements of small-pixel microbolometric FPA. Furthermore, the voltage signals from different working modules can be output according to a certain order through a high-speed output circuit. An experimental readout chip based on the proposed ROIC has been designed and fabricated to verify its readout function and performance. The measurement results of the experimental readout chip have successfully proved that the proposed CMOS ROIC can be applied to high-speed, low-noise, large-scale and high-resolution microbolometric FPA.     

High spatial resolution shortwave infrared imaging technology based on time delay and digital accumulation method

Shortwave infrared (SWIR) imaging technology attracts more and more attention by its fascinating ability of penetrating haze and smoke. For application of spaceborne remote sensing, spatial resolution of SWIR is lower compared with that of visible light (VIS) wavelength. It is difficult to balance between the spatial resolution and signal to noise ratio (SNR). Some conventional methods, such as enlarging aperture of telescope, image motion compensation, and analog time delay and integration (TDI) technology are used to gain SNR. These techniques bring in higher cost of satellite, complexity of system or other negative factors. In this paper, time delay and digital accumulation (TDDA) method is proposed to achieve higher spatial resolution. The method can enhance the SNR and non-uniformity of system theoretically. A prototype of SWIR imager consists of opto-mechanical, 1024 × 128 InGaAs detector, and electronics is designed and integrated to prove TDDA method. Both of measurements and experimental results indicate TDDA method can promote SNR of system approximated of the square root of accumulative stage. The results exhibit that non-uniformity of system is also improved by this approach to some extent. The experiment results are corresponded with the theoretical analysis. Based on the experiments results, it is proved firstly that the goal of 1 m ground sample distance (GSD) in orbit of 500 km is feasible with the TDDA stage of 30 for SWIR waveband (0.9–1.7 μm).     

Demonstration of large format mid-wavelength infrared focal plane arrays based on superlattice and BIRD detector structures

We have demonstrated the use of bulk antimonide based materials and type-II antimonide based superlattices in the development of large area mid-wavelength infrared (MWIR) focal plane arrays (FPAs). Barrier infrared photodetectors (BIRDs) and superlattice-based infrared photodetectors are expected to outperform traditional III–V MWIR and LWIR imaging technologies and are expected to offer significant advantages over II–VI material based FPAs. We have used molecular beam epitaxy (MBE) technology to grow InAs/GaSb superlattice pin photodiodes and bulk InAsSb structures on GaSb substrates. The coupled quantum well superlattice device offers additional control in wavelength tuning via quantum well sizes and interface composition, while the BIRD structure allows for device fabrication without additional passivation. As a demonstration of the large area imaging capabilities of this technology, we have fabricated mid-wavelength 1024 × 1024 pixels superlattice imaging FPAs and 640 × 512 MWIR arrays based on the BIRD concept. These initial FPA have produced excellent infrared imagery.     

High operating temperature SWIR p+–n FPA based on MBE-grown HgCdTe/Si(0 1 3)

The characteristics of SWIR (1.6–3 μm) 320 × 256 and 1024 × 1024 focal plane arrays (FPA’s) based on n-type In-doped HgCdTe heteroepitaxial layers are reported. The HgCdTe layers were grown by molecular beam epitaxy on silicon substrates with ZnTe and CdTe buffer layers. p–n junctions were formed by arsenic ion implantation into HgCdTe film. Reverse current in the temperature range from 210 to 330 K was found to be limited by the diffusion mechanism. At the same time in the temperature range from 140 to 210 K the reverse current was dominated by the thermal generation of charge carriers through deep traps located in the middle of the band gap. At 170 K NETD was less than 40 mK.