Low capacitance ESD protection circuits for GaAs RF ICs

We present a novel electrostatic discharge (ESD) protection circuit for GaAs radio frequency (RF) integrated circuits (ICs), which are targeted for 10 Gb/s fiber-optic communication applications. The robustness, parasitic impedance, and loading effect of the new ESD protection circuit are studied and compared with the conventional diode-based ESD protection technique. Two versions of this type of ESD protection circuit were fabricated with a 60-GHz InGaP heterojunction bipolar transistor (HBT) technology. These two circuits can withstand, respectively, 2700 and 5000 V human body model (HBM) ESD stress and provide a similar level of ESD protection to RF ICs. The corresponding impedances of the off state are represented by an equivalent shunt capacitance and shunt resistance of 0.22 pF and 500 Ω, and 0.5 pF and 250 Ω, at 10 GHz. This ESD protection circuit can protect the 10 Gb/s RF ICs against much higher level ESD stress than conventional diode-based ESD protection circuits even with smaller size.     

High voltage tolerant on-chip ESD protection in low-voltage BiCMOS process

A dual-direction ESD protection approach is applied to the problem of 60 V tolerant on-chip protection of the thin film resistors in automotive application circuits realized in 5 V BiCMOS process. A novel method for increasing the breakdown voltage of a blocked N-isolation layer is proposed and validated using process and device numerical simulation followed by experimental measurements.     

InGaP/GaAs HBT DC-20 GHz distributed amplifier with compact ESD protection circuits

This paper presents design considerations and implementation of InGaP/GaAs HBT DC-20 GHz distributed amplifier with compact ESD protection circuits. The inherit benefits of both bandwidth and ESD robustness of distributed amplifiers are first compared to those of single-ended feedback amplifiers. Next, novel on-chip ESD protection circuits are introduced, featuring low capacitance loading for wide bandwidth, low leakage, and good linearity under high RF power. This paper discusses the principle of operation, ESD performance, and RF loading of the ESD protection circuits. The RF performance and ESD robustness of the distributed amplifier with the ESD protection circuits are also presented.     

Ion implantation into fused quartz for integrated optical circuits

Results obtained in the fabrication of slab and strip waveguides by ion implantation into fused quartz are discussed. Using a step-index waveguide model the increase in refractive index is calculated. The optical loss is smaller than 1 dB/cm at λ = 568 nm without annealing. The properties of strip waveguides fabricated by ion implantation through photoresist masks of thicknesses from 0.4 μm to 0.8 μm are described. A bright fluorescence is observed with emission at 530 nm and 640 nm and its dependence on ion fluence and ion energy is measured.     

Novel substrate trigger SCR-LDMOS stacking structure for high-voltage ESD protection application

A novel substrate trigger semiconductor control rectifier-laterally diffused metal–oxide semiconductor(STSCRLDMOS) stacked structure is proposed and simulated using the transimission line pulser(TLP) multiple-pulse simulation method in a 0.35-μm, 60-V biploar-CMOS-DMOS(BCD) process without additional masks. On account of a very low holding voltage, it is susceptible to latch-up-like danger for the semiconductor control rectifier-laterally diffused metal–oxide semiconductor(SCR-LDMOS) in high-voltage electro-static discharge(ESD) protection applications. Although the conventional stacking structure has achieved strong latch-up immunity by increasing holding voltage, excessive high trigger voltage does not meet requirements for an ESD protection device. The holding voltage of the proposed stacked structure is proportional to the stacking number, whereas the trigger voltage remains nearly the same. A high holding voltage of 30.6 V and trigger voltage of 75.4 V are achieved.     

Opto-electronic integrated circuits using the InGaAsP/InP system

Recent developments in opto-electronic integrated circuits (OEICs) using the InGaAsP/InP system which is monolithically integrated with opto-electronic and electronic devices are discussed. The technological problems for the development of the OEICs are explained by reviewing recent developments in OEICs.     

An improved GGNMOS triggered SCR for high holding voltage ESD protection applications

Developing an electrostatic discharge(ESD) protection device with a better latch-up immunity has been a challenging issue for the nanometer complementary metal-oxide semiconductor(CMOS) technology. In this work, an improved grounded-gate N-channel metal-oxide semiconductor(GGNMOS) transistor triggered silicon-controlled rectifier(SCR)structure, named GGSCR, is proposed for high holding voltage ESD protection applications. The GGSCR demonstrates a double snapback behavior as a result of progressive trigger-on of the GGNMOS and SCR. The double snapback makes the holding voltage increase from 3.43 V to 6.25 V as compared with the conventional low-voltage SCR. The TCAD simulations are carried out to verify the modes of operation of the device.     

Measurement of multi-wavelength optical amplifier by using the I/O power-curve fitting technique

A low-cost and accurate measurement scheme for characterizing multi-wavelength optical amplifiers is experimentally demonstrated by using an amplified spontaneous emission source and a DWDM multiplexer. By linearly fitting the input and output optical spectral densities, the gain and noise figure of the optical amplifier are determined. The measured results agree well with the data obtained by time-domain-extinction method.     

Trigger mechanism of PDSOI NMOS devices for ESD protection operating under elevated temperatures

Trigger characteristics of electrostatic discharge(ESD) protecting devices operating under various ambient temperatures ranging from 30℃ to 195℃ are investigated.The studied ESD protecting devices are the H-gate NMOS transistors fabricated with a 0.18-μm partially depleted silicon-on-insulator(PDSOI) technology.The measurements are conducted by using a transmission line pulse(TLP) test system.The different temperature-dependent trigger characteristics of groundedgate(GGNMOS) mode and the gate-triggered(GTNMOS) mode are analyzed in detail.The underlying physical mechanisms related to the effect of temperature on the first breakdown voltage V_(T1) investigated through the assist of technology computer-aided design(TCAD) simulation.     

A mathematical expression for air ESD current waveform using BP neural network

A curve-fitting method based on backpropagation (BP) neural network (NN) is proposed for fitting electrostatic discharge (ESD) current waveforms and giving the corresponding expressions in order to analyze the characteristics of ESD and calculate the ESD electromagnetic pulse radiation field. According to IEC61000-4-2, this method is used to fit the ideal contact current waveform of human-metal ESD to obtain the mathematical expression. The waveform parameters of the fitting curve meet the requirements of the IEC61000-4-2. By fitting the measured air ESD current waveform at 4 kV discharge, the mathematical expression is obtained. This paper proposes the mathematical expression for arbitrary curves and analyzes the factors affecting the effects of curve-fitting.     

言语资料库和言语输入/输出评价方法

本文摘要介绍言语资料库和言语输入／输出评价方法研究的历史发展，国际组织，国家组织，以及国内外的现状和未来的工作．     

Improvement in interactive remote in situ visualization using SIMD-aware function parser and asynchronous data I/O

Journal of Visualization - An in situ visualization system based on the particle-based volume rendering offers a highly scalable and flexible visual analytics environment based on multivariate...     

Direct measurement for general quantum states using parametric quantum circuits

In the field of quantum information,the acquisition of information for unknown quantum states is very important.When we only need to obtain specific elements of a state density matrix,the traditional quantum state tomography will become very complicated,because it requires a global quantum state reconstruction.Direct measurement of the quantum state allows us to obtain arbitrary specific matrix elements of the quantum state without state reconstruction,so direct measurement schemes have obtained...     

源、漏到栅距离对次亚微米ggNMOS ESD保护电路鲁棒性的影响

基于对静电放电(electrostatic discharge,ESD)应力下高电压、大电流特性的研究,本文通过优化晶格自加热漂移-扩散模型和热力学模型,并应用优化模型建立了全新的0.6 μm CSMC 6S06DPDM-CT02 CMOS工艺下栅接地NMOS (gate grounded NMOS,ggNMOS)ESD保护电路3D模型,对所建模型中漏接触孔到栅距离(drain contact to gate spacing,DCGS)与源接触孔到栅距离(source contact to gate sp 关键词： 栅接地NMOS 静电放电 漏接触孔到栅的距离 源接触孔到栅的距离     

Total-Ionizing-Dose-Induced Body Current Lowering in the 130 nm PDSOI I/O NMOSFETs

The body current lowering effect of 130 nm partially depleted silicon-on-insulator(PDSOI) input/output(I/O)n-type metal-oxide-semiconductor field-effect transistors(NMOSFETs) induced by total-ionizing dose is observed and analyzed. The decay tendency of current ratio of body current and drain current I_b/I_d is also investigated.Theoretical analysis and TCAD simulation results indicate that the physical mechanism of body current lowering effect is the reduction of maximum lateral electric field of the pinch-off region induced by the trapped charges in the buried oxide layer(BOX). The positive charges in the BOX layer can counteract the maximum lateral electric field to some extent.     

Frequency-modulated continuous-wave lidar using I/Q modulator for simplified heterodyne detection

A frequency-modulated continuous-wave (FMCW) lidar is demonstrated with heterodyne detection. The lidar transmitter utilizes an electro-optic I/Q modulator for the first time to generate carrier-suppressed and frequency-shifted FM modulation. This eliminates the need for an acousto-optic frequency shifter commonly used in heterodyne lidar transmitters. It also allows the use of a much wider modulation bandwidth to improve the range resolution. The capability of complex optical field modulation of the I/Q modulator provides an additional degree of freedom compared with an intensity modulator, which will benefit future lidar applications.     

A comprehensive model for the I –V characteristics of metal-Ta 2 O 5 /SiO 2 -Si structures

The I–V characteristics of metal-Ta₂O₅/SiO₂-Si structures are precisely described with a comprehensive model, for both polarities, in the whole measurement range where there is no noticeable degradation and over seven orders of magnitude of the current. Hopping conduction and tunneling were elucidated to be the dominant conduction mechanisms in the SiO₂ layer and Poole–Frenkel internal field-assisted emission in the Ta₂O₅ layer. Other possible relevant mechanisms were discussed and subsequently discarded, based on their minor contribution. Theoretical calculations are made with fitted values of the defect related constants for hopping conduction of SiO₂ and Poole–Frenkel emission of Ta₂O₅ and the thickness of the SiO₂ layer. For gates positively biased, tunneling of electrons from the silicon conduction band through the SiO₂ is considered, while for gates negatively biased, tunneling of holes from the silicon valence band. Approximations for practical use are proposed and thus introduced limitations of the model discussed. The model is demonstrated on Al-insulator-Si structures containing thermally grown Ta₂O₅, previously studied in terms of microstructural, dielectric and electrical properties. The experimental results suggest that at higher current densities (>10 nA/cm²) an effect of compensation of the existing oxide charges by accumulated charges occurs. PACS 73.40.Qv; 73.50.-h; 73.61.-r; 77.55.+f     

Analysis of the plasmonic power splitter and MUX/DEMUX suitable for photonic integrated circuits

In this paper, the metal-insulator-metal (MIM) plasmonic directional coupler (PDC) with 45° waveguide bends based on surface plasmon polaritons (SPPs) excitation has been analyzed by the finite-difference time-domain (FDTD) numerical method. Effects of the variations of the coupler length and the metal gap thickness on the output powers and the propagation loss at 1550 nm wavelength have been studied. By choosing proper coupler lengths, power splitters with various output power ratios at 1550 nm wavelength and multi/demultiplexers, as some applications of the directional couplers have been proposed and their performances have been simulated.