BEPC II直线加速器数字BPM前端调理电路的研制

针对北京正负电子对撞机改造工程（BEPC II）直线加速器束流位置测量电子学系统故障率上升这一现状,结合BEPC II直线加速器束流参数以及BPM电子学ADC芯片带通采样的需求,设计了隔离度高、幅相一致性好的数字BPM射频前端电子学模块。数字BPM电子学系统采用MicroTCA 4.0系统架构,以FPGA作为主控制器,基于EDA软件开发设计。重点介绍了射频前端电子学模块中射频功率放大器、数字可调衰减器、带通滤波器等设计和实验室及在线测试结果。BEPC II对撞模式下,使用正电子束流,完成电子学系统在线测试,x方向位置测量精度约为38.46 μm,y方向位置测量精度约为26.16 μm,其测量精度和系统稳定性优于商用模拟BPM电子学模块,能够满足BEPC II直线加速器束流位置测量需求。     

ALICE光子谱仪前端电子学系统的性能研究

首先讨论了ALICE光子谱仪前端电子学的物理需求, 介绍了光子谱仪前端电子学测试系统. 采用该系统对光子谱仪前端电子学系统板(FEE)进行了检测, 检测表明现行设计的前端电子学系统板的物理性能已达到了ALICE实验的预期物理目标.     

HIRFL-CSR外靶实验T0探测器前端电子学原型模块设计

介绍了兰州重离子加速器冷却储存环（HIRFL-CSR）外靶实验中时间起点探测器（T0）的前端电子学原型模块的设计与测试。探索了基于过阈时间法和专用集成电路NINO芯片进行多气隙电阻板室探测器信号读出的模拟前端电路的设计技术,并实际完成了原型电子学模块的设计。此模块共集成6个测量通道,可以进行前沿甄别及电荷时间变换。目前已经在实验室条件下完成了各项电子学性能测试,包括不同甄别阈值下的时间精度测试以及不同输入信号幅度下的输出脉宽测试。测试结果表明,在100 fC至2 pC的动态范围内,此模块时间精度好于20 ps,满足应用需求,这也为进一步的电子学系统设计做好了准备。A prototype front end electronics (FEE) module is designed for the T0 detector in the External Experiment in CSR (Cooling Storage Ring) of HIRFL (Heavy Ion Research Facility in Lanzhou). Based on the Time-Over-Threshold method and NINO ASIC, a total of 6 channels are integrated in the module, and both high precision leading edge discrimination and Charge-to-Time Conversion can be achieved, which satisfies the readout requirement of MRPC (Multi-gap Resistive Plate Chamber). A series of tests were also conducted in the laboratory, including time precision tests with different thresholds and output pulse width tests with different input signal amplitudes. Test results indicate that this prototype module functions well, and the time precision is better than 20 ps in the dynamic range from 100 fC to 2 pC, which is beyond application requirement. Through this work, preparation is made for the future readout system design.     

BESⅢ漂移室全长模型的建造及基于全长模型的BESⅢ漂移室电子学的测试

建造了BESⅢ漂移室全长模型. 在气体密封, 高压供给及前端电子学安装方面为BESⅢ漂移室的成功建造积累了经验. 另外, 在全长模型上对BESⅢ漂移室电子学进行了测试, 包括噪声, 漂移时间测量, 电荷测量, 以及电子学增益等方面. 测试的最终结果显示了BESⅢ漂移室电子学具有很好的性能, 能够满足它们的设计要求.     

医用重离子回旋加速器径向探针系统（英文）

武威和兰州重离子加速器使用回旋加速器作为其注入器。回旋加速器为该装置的同步加速器提供10μA的碳离子束流以满足其物理需求。而径向探针则是安装在回旋加速器内部实现束流流强和圈图测量的重要束诊元件。径向靶头上的束流信息经前端电子学拾取后会进一步进入数据采集系统,最终实现回旋加速器的束流流强和圈图测试。其中,径向探针的前端电子学采用皮安表,数据采集系统基于实时操作系统和FPGA技术。介绍了径向探针的机械结构设计,并分析了探头有无水冷结构的热结构;描述了控制系统软硬件架构,可以实现10 kHz的数据和位置信息的同步采集。最后,还介绍了探针机械和控制系统的实验室测试和验收标准以及在束测量结果。     

中子闪烁探测器前端电子学的抗饱和改进

 ICF实验会产生大量X射线和γ射线,其在光电倍增管（PMT）中产生的脉冲信号过大,导致前端电子学电路饱和,严重影响电路的正常工作和中子飞行时间的测量。结合前端电子学系统的结构,对电路饱和的原因进行了深入分析,提出了非线性抗饱和电路改进方案,并进行了仿真和实验研究。仿真结果表明,该设计方案能够大幅衰减大信号而确保小信号的通过,信号通过后电路基线能在35 ns内恢复;电路的实测结果与仿真结果基本相同。这表明：采取的方案简洁有效,能够确保输入高达数十V脉冲的情况下电路的正常工作。目前这一电路已经得到应用,并将安装在某大型激光原型的大阵列中子探测器上。     

塑料闪烁体阵列探测器读出ASIC中峰值保持电路的设计

塑料闪烁体阵列探测器(PSD,简称塑闪阵列探测器)的输出信号经过前置放大器和滤波成形电路后输出准高斯波形,利用峰值保持电路可对准高斯波形信号的峰值进行采样和保持,以便后续的电子学系统对其进行进一步的分析。本工作采用180 nm CMOS工艺设计并实现了一款峰值保持电路ASIC芯片,每通道主要由跨导放大器(OTA)、电流镜和充电电容三部分电路组成。实验室电子学功能和性能测试结果表明：峰值保持电路功能良好;输入动态范围为33～940 mV,非线性误差优于0.8%,下垂速率好于8.6μV/μs,峰值探测延迟时间小于35 ns,芯片单通道静态功耗为825μW,达到设计要求。     

BESⅢ TOF前端读出电子学系统原型设计和实验结果

作为北京谱仪(Beijing Spectrometer, 简称BES)的改造, BESⅢ将把TOF(time-of-flight)测量精度提高到一个新的水平, 总时间分辨不大于90ps. 其中要求前端电子学(Front End Electronics, FEE)对时间测量的不确定性贡献小于25ps. 本文介绍了TOF前端读出电子学系统原型电路的设计和初步的测试结果.     

L3强子量能器第一个模块正比室的研制

本文报导L3强子量能器第一个模块60个正比室的研制和性能测试.在充以Ar(80%)+CO₂(20%)混合气条件下,室计数率坪长125V,坪坡度3.4%/100V.输出脉冲具有良好的均匀性.长时间的高压"锻炼"能使暗电流减小.由正比室装配成的强子量能器模块,在CERN SPS试验束上进行了性能测试.取得了满意的结果.     

基于开关电容阵列ASIC芯片的多通道波形数字化系统设计

基于开关电容阵列（SCA）技术可以实现超高速的波形数字化。本研究是基于实验室设计完成的FEL_SCA芯片进行8通道2 Gsps的波形数字化模块的设计,电路的配置和读出控制功能集成在单个FPGA中完成,此外该模块还包含SDRAM缓存及USB接口。目前已在实验室环境下对其进行了直流电压测试、瞬态波形测试和带宽测试,测试结果表明,在FEL_SCA芯片的输入动态范围100 mV~1 V之间,本波形数字化模块的INL好于1%,通道的RMS噪声约为1.76 mV,带宽约为450 MHz,达到设计目标。Switched Capacitor Arrays (SCAs) can be employed to achieve high speed waveform digitization. In this paper, we designed an 8-channel 2 Gsps waveform digitization module using four SCA chips named FEL_SCA which was designed in our laboratory. In this module, we used a FPGA device for data readout and circuit configuration. Besides, a 128 Mb SDRAM and USB interface were integrated in this module. We have also conducted DC voltage tests, transient tests and bandwidth tests on this module. The results indicate that in the signal voltage range 100 mV~1 V, the INL is better than 1%, the RMS noise is about 1.76 mV and the -3 dB input bandwidth is 450 MHz.     

一种新型低噪声大动态范围小型前端电路的研制

设计了一款小型化、低噪声、大动态范围的前端处理电路,包括电荷灵敏前放、成形放大电路、单道脉冲幅度分析电路。前放的等效输入噪声≤1.5 keV,动态范围可达0~11 V,积分非线性 ≤0.11%。该电路为模块化电路,当前放与主放模块构成系统时,其分辨可以达到0.12%。当前放、主放模块与中国科学院近代物理研究所制作的离子注入型硅探测器构成系统时,采用239Pu 源进行测试,测得在5.157 MeV时的能量分辨约为0.82%;当主放、单道脉冲幅度分析模块与中国科学院近代物理研究所制作的碘化铯晶体探测器构成系统时,采用60Co 源进行测试,对于能量为1.332 MeV 的 射线,测得其能量分辨约为7.9%。该电路可用于半导体探测器、光电倍增管及电子倍增器等探测器信号的处理。目前,小型前端电路已经应用于中国科学院近代物理研究所自行研制的便携式盐湖卤水铀、钍、钾快速测量仪的原型样机,达到了预期效果。A small dimension front-end circuit with low noise and wide output dynamic range is introduced in this paper. The front-end circuit is made up of a charge sensitive preamplifier, a shaping circuit and a single channel pulse height analyzer. The equivalent input noise is under 1.5 keV. The output integral nonlinearity is less than 0.11% within the dynamic range of 011 V. And the circuit can be suitable for different conditions by different modules. The resolution was about 0.12% with the charge sensitive preamplifier and the main amplifier. The energy resolution of 0.82% was achieved for 5.157 MeV -rays from a 239Pu source with the charge sensitive preamplifier, the main amplifier and anion-injection silicon detector designed by the Institute of Modern Physics(IMP). An energy resolution of 7.9% was achieved for 1.332 MeV rays from a stationary 60Co source with the main amplifier, the single channel pulse height analyzer and a CsI scintillator detector designed by the IMP. The front-end circuit has the features of wide output dynamic range, simple structure, high level of integration,small dimensions, low noise, fast rise time of the output pulse and excellent stability. The front-end circuit can be applied to signal processing of semiconductor detectors, photomultiplier tubes and electrons multiplier. And the front-end circuit had been applied to a prototype of the portable rapid measuring instrument designed by IMP for measuring Uranium, Thorium and Potassium in the salt lake brine with goodtest result.     

HIRFL-CSR外靶终端上硅微条探测器阵列的搭建

硅微条探测器因具有很强的位置分辨率与能量分辨率而在世界各大核物理实验室得到广泛应用。中国科学院近代物理研究所研制了性能优越、位置精度达到0.5 mm×0.5 mm的双面硅微条探测器,用于HIRFL-CSR的外靶实验终端谱仪(ETF)上,用作径迹测量以及△E-E望远镜系统△E的探测。硅微条探测器体积小、集成度高,利用柔性印刷电路板(FPCB)引出信号,配合ASIC芯片的前端电路,能够方便地给出每一条的能量信息和位置信息。在此详细阐述了在HIRFL-CSR的ETF上双面硅微条探测器阵列的搭建,并测量了放射源在真空中探测单元的能量分辨本领。结果表明,该硅条探测器的每个探测单元对5~9 MeV能量的α粒子的能量分辨率在1%左右。     

Viscous corrections for the viscous potential flow analysis of magnetohydrodynamic Kelvin-Helmholtz instability with heat and mass transfer

A ??E-E telescope exploiting a single silicon chip for both ??E measurement and scintillation light collection has been tested. It is a Si - CsI (Tl) telescope tailored for mass identification of light charged particles and intermediate mass fragments. A procedure based on two different shaping filters allows for extraction of the ??E-E information from the single silicon signal. The quality of the obtained fragment identification is expressed in terms of a figure of merit and compared to that of a standard ??E-E telescope. The presented configuration could be a good candidate for the basic cell of a large solid angle array of ??E-E telescopes, given the reduction in complexity and cost of the front-end electronics.     

Readout electronics testing of the CMS Tracker modules with LT setup

The tracking part of the CMS detector will be built with ∼16000 silicon detector modules, and kept at −10°C for the ten years of the operation of the LHC. All the model materials need to be verified of having a good performance at this low temperature, before their installation into the CMS Tracker. In order to track performance quality, assurance tests are done with two different systems. Of the two setups used, the LT system module is the one that is used to identify whether the performance of readout electronics and leakage current flowing on the silicon sensors is affected by low temperature. In this paper a detailed layout of the CMS TOB modules and their front-end hybrids are presented. In addition, the LT testing results of the 190 TOB modules that were produced and tested in 2004 by the FNAL-CMS group are given. The text was submitted by the author in English.     

L0 trigger unit prototype for BM@N setup

The BM@N facility is a fixed target experiment based on heavy ion beams of the Nuclotron-M accelerator. The aim of the BM@N is to study nucleus – nucleus collisions at energies up to 4.5 GeV per nucleon. A level 0 trigger processor unit (Trigger L0 unit, T0U) for the BM@N deuterons and carbon ions at Run’2015 has been developed. The T0U is used to generate a BM@N zero level trigger and a TOF detector precise start.T0U generates trigger signal based on beam line and target area detector signals. This module also provides both control and monitoring of the detector front-end electronics power supplies. This article presents a concept, characteristics and test results of the T0U module during the Run 2015.     

LTCC-Based Highly Integrated Millimeter-Wave Receiver Front-End Module

This paper presents the design and fabrication of a highly integrated Low Temperature Co-fired Ceramic (LTCC) receiver front-end module. This LTCC module is a dual channel receiver module, works at Ka-band, and fabricated including six Ferro A6M dielectric layers and five metal layers, contains eight embedded resistors and eight MMICs. All MMICs are mounted into pre-making cavities on the top surface of the LTCC substrate. Three slot coupled waveguide-to-microstrip transitions are integrated at LTCC substrate to realize RF and LO signal input. The developed module is highly integrated and reliable, which has a compact size of 58 × 50 × 22 mm³ (including the metal cavity). Each channel of the receiver has the noise figure of less than 9 dB and the gain of more than 24 dB at Ka-band.     

Strip silicon waveguide for code synchronization in all-optical analog-to-digital conversion based on a lumped time-delay compensation scheme

An all-optical analog-to-digital converter(ADC) based on the nonlinear effect in a silicon waveguide is a promising candidate for overcoming the limitation of electronic devices and is suitable for photonic integration. In this paper, a lumped time-delay compensation scheme with 2-bit quantization resolution is proposed. A strip silicon waveguide is designed and used to compensate for the entire time-delays of the optical pulses after a soliton self-frequency shift(SSFS) module within a wavelength range of 1550 nm–1580 nm. A dispersion coefficient as high as-19800 ps/(km·nm) with ±0.5 ps/(km·nm)variation is predicted for the strip waveguide. The simulation results show that the maximum supportable sampling rate(MSSR) is 50.45 GSa/s with full width at half maximum(FWHM) variation less than 2.52 ps, along with the 2-bit effectivenumber-of-bit and Gray code output.     

A Flash-ADC data acquisition system developed for a drift chamber array and a digital filter algorithm for signal processing

A Flash-ADC data acquisition (DAQ) system has been developed for the drift chamber array designed for the External-Target-Experiment at the Cooling Storage Ring at the Heavy Ion Research Facility, Lanzhou. The simplified readout electronics system has been developed using the Flash-ADC modules and the whole waveform in the sampling window is obtained, with which the time and energy information can be deduced with an offline processing. A digital filter algorithm has been developed to discriminate the noise and the useful signal. With the digital filtering process, the signal to noise ratio (SNR) is increased and a better time and energy resolution can be obtained.     

光纤探针诊断100 kA-LTD模块开关的同步性

设计了一套用于同轴多间隙气体开关导通起始时间诊断的光纤探针阵列测试系统,其由光纤阵列与多通道快响应光电转换仪两部分组成,系统同步时间小于1 ns。使用该套系统同时对100 kA-LTD模块所有并联支路的10只开关的放电过程进行了测试,获得了开关导通起始时间及模块的输出电流波形。实验结果表明:开关工作欠压比为85%时,时间抖动不超过6.9 ns,负载波形重复一致性较好;开关工作欠压比降至53%时,时间抖动急剧增加至117.7 ns,负载波形重复一致性显著恶化。同时将光纤测试系统获得的各个开关导通起始时间带入PSpice电路模型进行模拟反演,结果表明,模拟结果与实验得到的模块输出电流波形吻合较好,证明了测试系统的准确性。