Design of Square-Root Domain Filters

In this paper, a square-root domain band-pass filter and biquad filter which are based on the MOSFET square law are proposed. Both of the square-root domain filters operated at 2.5 V supply voltage are constituted by current mirrors, current-mode square-root circuits and capacitors. The circuits presented have been simulated and fabricated using 0.25 m CMOS process. Both of simulation and measured results which are in good agreement indicate that the center frequency f₀ is not only attainable at megahertz frequencies but also tunable electronically. The proposed circuits have the merits of high frequency operation, tuneability, low power supply voltage operation, low third order intermodulation distortion and low total harmonic distortion.Gwo-Jeng Yu was born in Kaohsiung, Taiwan, R.O.C., in 1954. He received the B.S. and M.S. degrees in the Department Electronic Engineering in 1972 and 1976, respectively, from National Chiao Tung University, HsinChu, Taiwan, R.O.C., and he is currently working toward the Ph.D. degree in the Department of Electrical Engineering of National Cheng Kung University, Tainan, Taiwan, R.O.C.Since 1978, he has been on the Faculty of Institute of Cheng Shiu Technology, Kaohsiung, Taiwan, R.O.C., where he is currently a Associate Professor in the Department of Electronic Engineering. During 1979–1990, he was the Chairman of the Electronic Engineering Department and the Chairman of the Microelectronics and Information Technology Center during 1996–2000.His current researches include current-mode circuits design, analog IC design and VLSI circuit design.Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from the National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of the Department of Electronic Engineering. His current researches include current-mode circuits design, VLSI design, analog IC design, and analog IP design.Bin-Da Liu received the B.S., M.S., and Ph.D. degrees all in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1973, 1975, and 1983, respectively.Since 1977 he has been on the faculty of the National Cheng Kung University, where he is currently Distinguished Professor in the Department of Electrical Engineering and Director of the SoC Research Center. During 1983–1984, he was a Visiting Assistant Professor in the Department of Computer Science, University of Illinois at Urbana-Champaign. During 1988–1992, he was the Director of Electrical Laboratories, National Cheng Kung University. He was the Associate Chair of the Electrical Engineering Department during 1996–1999 and the Chair during 1999–2002. Since 1995 he has been a consultant of the Chip Implementation Center, National Applied Research Laboratories. He has published more than 190 technical papers. He also contributed chapters in the book Neural Networks and Systolic Array Design (D. Zhang, Ed. Singapore: World Scientific Publisher, 2002) and the book Accuracy Improvements in Linguistic Fuzzy Modeling (J. Casillas, O. Cordón, F. Herrera, and L. Magdalena, Eds. Heidelberg, Germany: Springer-Verlag, 2003). He is currently a CAS Associate Editor of the IEEE Circuits {&} Devices Magazine and an Associate Editor of the IEEE Transactions on Circuits and Systems-I. His current research interests include low power circuit design, SoC system integration and verification, and VLSI implementation for fuzzy-neural networks and audio/video signal processors.Jenn-Jiun Chen received the B.S. and M.S. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 2001 and 2003, respectively. His research interests are design and modeling of current mode circuit, low power analog circuit design, current mode filters, and instrumental amplifier in micro sensor applications. He received Chip Design Award from the Chip Implementation Center, National Applied Research Laboratories, in 2002.     

Square-Root Domain Operational Simulation of LC Ladder Elliptic Filters

A technique for designing square-root domain elliptic filters that simulate the operation of the corresponding LC ladder prototypes is introduced in this paper. This is achieved by manipulating the equations that describe the operation of differentiation in such a way that only lossless integrator and weighted summation blocks are needed. The derived signal flow graph (SFG) is transposed to the corresponding one in the square-root domain using an appropriate set of operators in order to preserve the linear operation of the whole filter. In order to demonstrate the validity of the proposed technique, a third-order elliptic lowpass filter was simulated and its behavior was evaluated using an HSPICE simulator.     

New Square-Root Domain Oscillators

This paper presents phase calibration technique without using any external tone for weaver image-reject receiver. Error signal (phase mismatch information) is generated using a simple algorithm and this signal is used for mismatch elimination. Calibration system has been implemented using simulink which shows an image rejection ratio of 59.5 dB can be achieved for RF signal operating at 1.8 GHz.     

Switched-Current Filters by Component Simulation

This paper discusses the synthesis of switched-current filters from continuous-time prototypes by the simulation of components, particularly capacitors and transconductors in Transconductance-C filters. The obtained structures implement discrete-time versions of the prototype circuit using bilinear or Euler formulas. All the proposed structures work with doubled effective sampling rate (sampling the input and updating the output at each phase), make strict use of voltage-sampling switches and naturally admit two-phases nonoverlapping clocks.     

A Square-Root Domain Differentiator Circuit

Companding circuits are very useful blocks for realizing low-voltage, high-frequency analog systems. They are implemented using the translinear principle and the quadratic/exponential I-V characteristic of MOS/BJT transistor. In this paper, a Square-Root Domain differentiator is proposed. It is constructed from an appropriate input stage that converts the input current into a compressed voltage at a capacitor's node, and simultaneously senses the capacitor's current. The overall configuration of the differentiator also includes a current geometric-mean circuit and a multiplier, both based on a translinear loop. An attractive characteristic of the proposed circuits is their immunity to body effect. HSPICE simulation results were used for evaluating the behaviour of the differentiator.     

开关电流梯形滤波器的双线性变换设计

本文提出了一种用双线性变换进行开关电流（ＳＩ）梯形滤波器设计的方法。该方法不经ＳＣ滤波器，而直接用提出的ＳＩ模块－双线性／差分（ＢｉＤ）积分器去精确模拟全极点及有限零点ＬＣ原型。从而使滤波器设计步骤及电路结构得到简化。     

开关电流高阶滤波器的设计

开关电流电路属于电流模电路，它具有电流模电路的诸多优点。文章介绍了两种映射设计开关电流高阶滤波器的方法，通过设计实例，证明了这两种方法是正确的。     

A High Performance Square-Root Domain Integrator

In this work a true square-root domain integrator configuration is proposed, which is implemented using new current geometric-mean and multiplier/divider blocks. The main advantage of the proposed configuration, in comparison with previous realizations, is the immunity to the body effect. Additional important features are low-voltage operation capability, linear tuneability and design modularity.     

1.5 V tunable Square-Root Domain filter

A novel approach to the design of low-voltage CMOS Square-Root Domain filters is presented. It is based on the large-signal behaviour of a well-known class-AB linear transconductor. A first-order filter is built employing three such transconductors, featuring simplicity and compactness. Measurement results for an experimental prototype in 0.8 /spl mu/m CMOS validate the technique proposed. The filter operates with a single supply voltage of 1.5 V and can be tuned in more than one decade.     

耦合二次节型开关电流带通滤波器的改进双线性设计

本文采用改进双线性变换，以一种新型双二次节为基块进行开关电流（ＳＩ）带通滤波器的设计。这种双二次节是用本文提出的双抽样方式ＳＩ改进型通用积分器构成的。文中介绍了耦合二次节型全极点及有限传输零点带通滤波器的设计方法。用该方法设计的ＳＩ滤波电路具有较好的高频特性，并能保持无源原型的低灵敏度特点。文中给出了Ｃｈｅｂｙｓｈｅｖ和Ｅｌｌｉｐｔｉｃ带通滤波器设计的实例。     

Switched-Current Wave Filters with Reduced Number of Current Inversions

Switched-current wave filters offer very simple structures, as their main building blocks are current mirrors. On the other hand, the achieved accuracy is mainly degraded due to the effect of MOS transistor parameters mismatch. In this Letter, new configurations of serial and parallel adaptors that are used in the simulation of inductances and capacitors of the LC ladder prototype are introduced. These have been implemented using an appropriate sharing of the delay that should be presented between the incident and reflected waves at a port of adaptor, and a 3-phase clocking scheme. The number of required current inversions and consequently the effect of mismatching are reduced in the proposed configurations.     

Design of Current-Mode Square-Root Domain Band-Pass Filter with Reduced Voltage

A design technique for current-mode square-root domain band-pass filter fabricated in a 0.25 μ m CMOS process is presented. The basic building block consists of current-mode current mirrors, square-root circuits and capacitors, and in which the overall supply voltage is reduced by adopting low-voltage level-shift current mirror. Both of the simulation and measured results, which are in good agreement, indicate that the prototype of the band-pass provides tunable center frequency of 4–10 MHz with bias-current-tunable, −26.7 dB total harmonic distortion (THD), and approximately 1.598 mW power dissipation with a 1.5 V supply voltage. Advantages of the proposed filter include high frequency operation, tuneability, low supply voltage operation, low power consumption, and low third order intermodulation distortion. Gwo-Jeng Yu was born in Kaohsiung, Taiwan, R.O.C., in 1954. He received the B.S. and M.S. degrees in the Department Electronic Engineering in 1972 and 1976, respectively, from National Chiao Tung University, HsinChu, Taiwan, R.O.C., and he is currently working toward the Ph.D. degree in the Department of Electrical Engineering of National Cheng Kung University, Tainan, Taiwan, R.O.C. Since 1978, he has been on the Faculty of Institute of Cheng Shiu Technology, Kaohsiung, Taiwan, R.O.C., where he is currently a Associate Professor in the Department of Electronic Engineering. During 1979–1990, he was the Chairman of the Electronic Engineering Department and the Chairman of the Microelectronics and Information Technology Center during 1996–2000. His current researches include current-mode circuits design, analog IC design and VLSI circuit design. Chun-Yueh Huang was born in Taichung, Taiwan, Republic of China, on March 24, 1967. He received the B.S. degree in industrial education from the National Chang Hwa Normal University, Chang Hwa, Taiwan in 1991, M.S. and Ph.D. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1993 and 1997, respectively. Since 1999 he has been with the Kan Shan University of Technology, where he is currently Associate Professor and Chairman of the Department of Electronic Engineering. His current researches include current-mode circuits design, VLSI design, analog IC design, and analog IP design. Jenn-Jiun Chen received the B.S. and M.S. degrees both in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 2001 and 2003, respectively. His research interests are design and modeling of current mode circuit, low power analog circuit design, current mode filters, and instrumental amplifier in micro sensor applications. He received Chip Design Award from the Chip Implementation Center, National Applied Research Laboratories, in 2002. Bin-Da Liu received the B.S., M.S., and Ph.D. degrees all in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1973, 1975, and 1983, respectively. Since 1977 he has been on the faculty of the National Cheng Kung University, where he is currently Distinguished Professor in the Department of Electrical Engineering and Director of the SoC Research Center. During 1983–1984, he was a Visiting Assistant Professor in the Department of Computer Science, University of Illinois at Urbana-Champaign. During 1988–1992, he was the Director of Electrical Laboratories, National Cheng Kung University. He was the Associate Chair of the Electrical Engineering Department during 1996–1999 and the Chair during 1999–2002. Since 1995 he has been a consultant of the Chip Implementation Center, National Applied Research Laboratories. He has published more than 190 technical papers. He also contributed chapters in the book Neural Networks and Systolic Array Design (D. Zhang Ed. Singapore: World Scientific Publisher, 2002) and the book Accuracy Improvements in Linguistic Fuzzy Modeling (J. Casillas, O. Cordn, F. Herrera, and L. Magdalena Eds. Heidelberg, Germany: Springer-Verlag, 2003). He is currently a CAS Associate Editor of the IEEE Circuits & Devices Magazine and an Associate Editor of the IEEE Transactions on Circuits and Systems-I. His current research interests include low power circuit design, SoC system integration and verification, and VLSI implementation for fuzzy-neural networks and audio/video signal processors.     

Novel Approximate Square-Root Domain All-Pass Filter with Application to Multiphase Oscillators

A novel approximate square-root domain all-pass filter operating from a single 3.3 V supply is reported. The circuit requires a small number of transistors, with a bandwidth exceeding 100 MHz. Two-phase and three-phase oscillators based on cascaded sections of the proposed filter are constructed followed by a generic multiphase oscillator. Simulation results, using AMS 0.35 μ BiCMOS technology parameters, and experimental results are given.     

Optimal Security Proofs for Full Domain Hash,Revisited

RSA Full Domain Hash (RSA-FDH) is a digital signature scheme, secure against chosen message attacks in the random oracle model. The best known security reduction from the RSA assumption is non-tight, i.e., it loses a factor of \(q_s\), where \(q_s\) is the number of signature queries made by the adversary. It was furthermore proven by Coron (Advances in cryptology—EUROCRYPT 2002, Lecture notes in computer science, vol 2332. Springer, Berlin, pp 272–287, 2002) that a security loss of \(q_s\) is optimal and cannot possibly be improved. In this work, we uncover a subtle flaw in Coron’s impossibility result. Concretely, we show that it only holds if the underlying trapdoor permutation is certified. Since it is well known that the RSA trapdoor permutation is (for all practical parameters) not certified, this renders Coron’s impossibility result moot for RSA-FDH. Motivated by this, we revisit the question whether there is a tight security proof for RSA-FDH. Concretely, we give a new tight security reduction from a stronger assumption, the Phi-Hiding assumption introduced by Cachin et al. (Advances in Cryptology—EUROCRYPT’99. Lecture notes in computer science, vol 1592. Springer, Berlin, pp 402–414, 1999). This justifies the choice of smaller parameters in RSA-FDH, as it is commonly used in practice. All of our results (positive and negative) extend to the probabilistic signature scheme PSS (with message recovery).     

Boundedness of Multidimensional Filters Over a Prescribed Frequency Domain

Signal processing often requires the magnitude of a filter simultaneously upper and lower bounded on some specified frequency domains. In this paper, on the basis of the structure of the span of a multivariate matrix polynomial, a sufficient condition is derived for the boundedness of a multidimensional multiple-input multiple-output (MIMO) infinite-impulse-response (IIR) filter over a cuboid frequency domain. This condition is expressed through a linear matrix inequality (LMI) and can be proved to be less conservative than a condition derived from an upper bound of matrix structured singular value. Moreover, using parameter dependent LMIs and the linear fractional transformation structure of the filter, two necessary and sufficient conditions are also obtained for this boundedness verification problem, which are again expressed by LMIs. Furthermore, LMI based conditions are derived for filter output matrix and direct transmission matrix, which are applicable to filter design. Numerical examples are included to illustrate the efficiency and characteristics of the derived theoretical results.      

Contourlet变换中不同滤波器对图像去噪效果的研究

在对Contourlet变换涉及的方向滤波器和金字塔滤波器分析的基础上,验证了选择不同滤波器对图像去噪的影响,提出在Contourlet变换中应用具有视觉特性的紧支双正交滤波器,可以提高图像去噪的效果.仿真试验表明,文中提出的滤波器不仅使原有的Contourlet变换的去噪效果获得提高,而且文中提出的滤波器使CHMT(Contourlet domain Hidden Markov Trees)去噪效果得到优化,去噪后图像的PSNR有明显提高.     

Design of Multidimensional Separable-Denominator Digital Filters in the Spatial Domain

Based on a concept of minimal decomposition and balanced realization, a novel technique is developed for designing multidimensional (M-D) separable-denominator digital filters in the spatial domain. This is done by decomposing a desired M-D FIR filter into M parts and by representing it by a cascade connection of M 1-D filters. The minimal decomposition treated here can be viewed as an extension of that in 2-D separable-denominator case in some sense. However, the proposed technique differs from the existing one even in 2-D case and is simpler. Two numerical examples are also given to illustrate the utility of the proposed technique. The amount of calculation required here is relatively small and the stability of the filter is always guaranteed.     

A Study of Different Class AB Log Domain First Order Filters

Several different class AB log-domain/translinear filters are compared in terms of their noise and distortion behavior using both analytical and simulation results. A few of the circuit topologies shown have not been considered before and are derived using a new theory for class AB dynamical circuits recently proposed. The study, although approximate, suggests ways in which both noise and distortion performance may be optimized by appropriate choice of circuit topology. Other practical aspects of the designs are also discussed.     

时间尺度域的匹配滤波器与信号检测

本文从连续子波变换和子波级数的性质及子波的框架理论出发，推导了时间尺度域的匹配滤波器形式，理论分析表明它的思想性能和匹配滤波器相同。     

开关电流技术：一种新的模拟抽样数据处理方法

开关电流（ＳＩ）技术是一种新的模拟抽样数据处理技术，介绍了开关电流电路的基本单元结构，讨论了目前开关电流技术中存在的问题及其解决方法。对开关电流技术与开关电容技术的一些基本特征进行了比较，ＳＩ技术不仅结构简单，而且与标准ＣＭＯＳ工艺兼容，可望替代开关电容电路。