Continued-fraction algorithm for biased model reduction

An algorithm is presented for linear system reduction which produces biased models such that combinations of retained time moments and Markov parameters may be varied. It is based on the Cauer continued-fraction expansions of the first and second forms and is easy to apply. An example demonstrates the method.     

A Wiener process model for accelerated degradation analysis considering measurement errors

Accelerated degradation analysis plays an important role in assessing reliability and making maintenance schedule for highly reliable products with long lifetime. In practical engineering, degradation data, especially measured under accelerated condition, are often compounded and contaminated by measurement errors, which makes the analysis more challenging. Therefore, a Wiener process model simultaneously incorporating temporal variability, individual variation and measurement errors is proposed to analyze the accelerated degradation test (ADT). The explicit forms of the probability distribution function (PDF) and the cumulative distribution function (CDF) are derived based on the concept of first hitting time (FHT). Then, combining with the acceleration models, the maximum likelihood estimations (MLE) of the model parameters are obtained. Finally, a comprehensive simulation study involving two examples and a practical application are given to demonstrate the necessity and efficiency of the proposed model.     

A comprehensive model for oxide degradation

In this work we present two analytical (and physically supported) models to describe trap kinetics in both thin and ultra-thin SiO₂ films. The models are based on the different mechanism controlling the carrier transport through the oxides and on the assumption of a two step process for creating stable traps, through defect precursors. Experimental data of stress induced leakage current confirm the validity of models predictions. Furthermore, a systematic study of the transient of trap kinetics experimentally demonstrates the existence of defect precursors as well as a reduction of oxide damage under pulsed stress condition respect to DC case.     

A non‐biased trust model for wireless mesh networks

Trust models that rely on recommendation trusts are vulnerable to badmouthing and ballot‐stuffing attacks. To cope with these attacks, existing trust models use different trust aggregation techniques to process the recommendation trusts and combine them with the direct trust values to form a combined trust value. However, these trust models are biased as recommendation trusts that deviate too much from one's own opinion are discarded. In this paper, we propose a non‐biased trust model that considers every recommendation trusts available regardless they are good or bad. Our trust model is based on a combination of 2 techniques: the dissimilarity test and the Dempster‐Shafer Theory. The dissimilarity test determines the amount of conflict between 2 trust records, whereas the Dempster‐Shafer Theory assigns belief functions based on the results of the dissimilarity test. Numerical results show that our trust model is robust against reputation‐based attacks when compared to trust aggregation techniques such as the linear opinion pooling, subjective logic model, entropy‐based probability model, and regression analysis. In addition, our model has been extensively tested using network simulator NS‐3 in an Infrastructure‐based wireless mesh networks and a Hybrid‐based wireless mesh networks to demonstrate that it can mitigate blackhole and grayhole attacks.     

A degradation model for metallized polyester capacitors

Till now it was usual to think that the physical degradation of the end-spray contacts of metallized polyester capacitors, accelerated by exposure to high temperature, only implied an increase of the equivalent series resistance. This paper reports that together with this resistance increase, a contribution due to a parasitic capacitance must be taken into account to describe this degradation mechanism correctly.A degradation model is presented that enables fairly good fitting of experimental measurements of capacitance, dissipation factor and impedance vs. frequency of capacitors submitted to long-term tests, that exhibit an electrical behaviour deviating from the one described by the usual equivalent series circuit.The paper illustrates a technological analysis method that enables the consistence of the proposed model to be confirmed and that can currently be used to make quick estimations of the reliability performance of components by different manufacturers and to carry out periodic quality control.It was also seen that, in well manufactured capacitors, the described degradation mechanism is rather slow, with respect to the high temperature exposure time, so that the reliability level of these components is not affected.     

Internally biased transistor simulation model

An augmented transistor model where a three-terminal device is atomically biased internally is presented. A duplicate of the signal transistor is used to solve the bias equation. This model makes it convenient to compare circuit topologies by simulation     

A unified model for the self-limiting hot-carrier degradation inLDD n-MOSFETs

A new insight into the self-limiting hot-carrier degradation in lightly-doped drain (LDD) n-MOSFETs is presented. The proposed model is based on the charge pumping (CP) measurement. By progressively lowering the gate base level, the channel accumulation layer is caused to advance into the LDD gate-drain overlap and spacer oxide regions, extending the interface that can be probed. This forms the basis of a novel technique, that allows the contributions to the CP current, due to stress-induced interface states in the respective regions, to be effectively separated. Results show that interface state generation initiates in the spacer oxide region and progresses rapidly into the overlap/channel region with stress time. The close correspondence between the linear drain current degradation, measured at high and low gate bias, and the respective interface state generation in the spacer and the overlap/channel regions deduced from CP data, provides an unambiguous experimental evidence that the degradation proceeds in a two-stage mechanism, involving first a series resistance increase and saturation, followed by a carrier mobility reduction. The saturation in series resistance increase results directly from a reduced interface state generation rate in the spacer oxide. For a given density of defect precursors and considering an almost constant channel field distribution near the drain region during stress, interface trap generation rate is shown to exhibit an exponential stress time dependence, with a characteristic time constant determined by the applied voltages. This observation leads to a lifetime extrapolation methodology. Lifetime due to a particular stress drain voltage V_d, may be extracted from a single composite degradation characteristic, obtained by shifting characteristics for various stress V_d's, along the stress time axis, until the characteristics merge into a single curve     

A model for AC hot-carrier degradation in n-channel MOSFETs

A recently developed model for AC hot-carrier lifetimes is shown to be valid for typical and worst-case stress waveforms found in CMOS circuits. Three hot-carrier damage mechanisms are incorporated into the model: interface states created at low and medium gate voltages, oxide electron traps created at low gate voltages, and oxide electron traps created at high gate voltages. It is shown that the quasi-static contributions of these three mechanisms fully account for hot-carrier degradation under inverterlike AC stress. No transient effects are required to explain AC stress results, at least for frequencies up to 1 MKz     

Experimental analysis of biased gap klystron

A commercially available multicavity klystron rated at 45 percent efficiency and equipped with external cavities was modified so that a dc potential could be applied across the interaction gaps. When the tube was carefully tuned, an efficiency of 60 percent was obtained; when an accelerating bias was applied across the penultimate gap of the tube, efficiencies of 66 percent were recorded without collector depression, and of over 70 percent with collector depression. In addition, applying bias to the tube made possible efficiencies in excess of 60 percent for a five to one range of power levels (for different cathode voltages). Furthermore, it was possible to apply bias to the tube in such a way that, for a constant drive level, the power output remained constant, the efficiency remained constant at over 50 percent, but the phase could be varied through more than 180°.     

Semisupervised biased maximum margin analysis for interactive image retrieval

With many potential practical applications, content-based image retrieval (CBIR) has attracted substantial attention during the past few years. A variety of relevance feedback (RF) schemes have been developed as a powerful tool to bridge the semantic gap between low-level visual features and high-level semantic concepts, and thus to improve the performance of CBIR systems. Among various RF approaches, support-vector-machine (SVM)-based RF is one of the most popular techniques in CBIR. Despite the success, directly using SVM as an RF scheme has two main drawbacks. First, it treats the positive and negative feedbacks equally, which is not appropriate since the two groups of training feedbacks have distinct properties. Second, most of the SVM-based RF techniques do not take into account the unlabeled samples, although they are very helpful in constructing a good classifier. To explore solutions to overcome these two drawbacks, in this paper, we propose a biased maximum margin analysis (BMMA) and a semisupervised BMMA (SemiBMMA) for integrating the distinct properties of feedbacks and utilizing the information of unlabeled samples for SVM-based RF schemes. The BMMA differentiates positive feedbacks from negative ones based on local analysis, whereas the SemiBMMA can effectively integrate information of unlabeled samples by introducing a Laplacian regularizer to the BMMA. We formally formulate this problem into a general subspace learning task and then propose an automatic approach of determining the dimensionality of the embedded subspace for RF. Extensive experiments on a large real-world image database demonstrate that the proposed scheme combined with the SVM RF can significantly improve the performance of CBIR systems.     

A comprehensive model of PMOS NBTI degradation

Negative bias temperature instability has become an important reliability concern for ultra-scaled Silicon IC technology with significant implications for both analog and digital circuit design. In this paper, we construct a comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model. We demonstrate how to solve the reaction–diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work. We also augment this basic reaction–diffusion model by including the temperature and field-dependence of the NBTI phenomena so that reliability projections can be made under arbitrary circuit operating conditions.     

A mobility model for submicrometer MOSFET simulations includinghot-carrier-induced device degradation

The model presented includes the quantum effects of electrons in the inversion layer proposed by S.A. Schwarz and S.E. Russek (1983) and the surface scattering effects due to the interfacial charges. By comparison with experimental data from scaled MOSFETs, the limitation of K. Yamaguchi's (1983) mobility model in submicrometer device simulations is implied, while the quantum channel broadening effects have been proven significant in turn. In addition, it is shown that the modeling of the screening effect of Coulomb scattering plays an important role in simulating the hot-carrier-induced MOSFET degradation. The model can predict the current-voltage characteristics within 5% accuracy for scaled MOSFETs down to 0.5-μm, as well as the degradation of electrical characteristics due to hot-carrier effects for submicrometer MOSFETs     

A comprehensive model for PMOS NBTI degradation: Recent progress

Negative bias temperature instability (NBTI) is a well-known reliability concern for PMOS transistors. We review the literature to find seven key experimental features of NBTI degradation. These features appear mutually inconsistent and have often defied easy interpretation. By reformulating the Reaction–Diffusion model in a particularly simple form, we show that these seven apparently contradictory features of NBTI actually reflect different facets of the same underlying physical mechanism.     

Properties of ZnO thin films through percolation model

Through the use of percolation method, a study on electrical transport properties of polycrystalline ZnO material is realized as an electric field or a temperature gradient is acting on the sample. This treatment is made taking into account the non-equilibrium quantum transport domain through the usage of Boltzmann equation. In this study the distribution function is calculated by means of an approximation method which is of low order; then electrical conductivity is determined as a thermoelectric coefficient.     

A physical-based analytical model for hot-carrier inducedsaturation current degradation of p-MOSFET's

The delay time of a CMOS inverter is directly related to the p-MOSFET saturation current. An accurate aging model for the saturation current is essential for the modeling of the CMOS inverter degradation. In this paper, we report that the saturation current degradation proceeds logarithmically in stress time. A physical analytical model, based on the pseudo-two-dimensional model, is derived for the first time to describe the saturation current degradation under various stress and measurement conditions. There are no empirical parameters in the model. Two physical parameters, the capture cross section and the density of states of electron traps, can be determined independently from the measured degradation characteristics. The simple expression is highly recommended for the modeling of the degradation of the digital CMOS circuits     

Analytical percolation model for predicting anomalous charge loss in flash memories

Data retention in flash memories is limited by anomalous charge loss. In this work, this phenomenon is modeled with a percolation concept. An analytical model is constructed that relates the charge-loss distribution of moving bits in flash memories with the geometric distribution of oxide traps. The oxide is characterized by a single parameter, the trap density. Combined with a trap-to-trap direct tunneling model, the physical parameters of the electron traps involved in the leakage mechanism are determined. Flash memory failure rate predictions for different oxide qualities, thicknesses and tunnel-oxide voltages are calculated.     

A model for the critical voltage for electrical degradation of GaN high electron mobility transistors

It has recently been postulated that GaN high electron mobility transistors under high voltage stress degrade as a result of defect formation induced by excessive mechanical stress that is introduced through the inverse piezoelectric effect. This mechanism is characterized by a critical voltage beyond which irreversible degradation takes place. In order to improve the electrical reliability of GaN HEMTs, it is important to understand and model this degradation process. In this paper, we formulate a first-order model for mechanical stress and elastic energy induced by the inverse piezoelectric effect in GaN HEMTs which allows the computation of the critical voltage for degradation in these devices.     

Performance analysis of the biased square-law sequential detectorwith signal present

A new method is proposed to analyze the performance of a biased square-law sequential detector when a signal is present. Starting from Albert's (1954) integral equations, the method evaluates the detection probability and the moments of the sample number very efficiently and accurately, using polynomial interpolations. Numerical examples show that the new method is much more efficient and/or accurate than the known methods. In addition, the analytical results are substantiated by computer simulations and Kendall's (1965) exact results for the cases of with and without signal present, respectively