pMOS金属栅极材料的研究进展

随着金属氧化物半导体场效应管（metal-oxide-semiconductor field-effect transistors,MOSFETs）等比缩小迈向45nm技术节点,金属栅极已应用于新型MOSFET器件,改善了与高k栅介质的兼容性,并消除了传统多晶硅栅极的栅耗尽及硼穿透等效应.文章综述了pMOS器件金属栅极材料的发展历程、面临的主要问题以及未来的研究趋势等.     

稀土元素掺杂的Hf基栅介质材料研究进展

随着金属氧化物半导体场效应管(MOSFETs)等比缩小到45 nm技术节点,具有高介电常数的栅介质材料(高k材料)取代传统的SiO₂已经成为必然,然而Hf基高k材料在实际应用中仍然存在许多不足,而稀土元素掺杂在提高Hf基栅介质材料的k值、降低缺陷密度、调整MOSFETs器件的阈值电压等方面表现出明显的优势.本文综述了Hf基高k材料的发展历程,面临的挑战,稀土掺杂对Hf基高k材料性能的调节以及未来研究的趋势. 关键词： k栅介质')" href="#">Hf基高k栅介质 稀土掺杂 氧空位缺陷 有效功函数     

呼之欲出的新一代MOS栅极电介质材料

传统的SiO2栅极电介质材料无法克服MOS器件特征尺度缩小带来的量子隧穿效应的影响.作为进一步提高微电子器件集成度的途径,利用新一代具有高介电常数的栅极电介质材料取代SiO2的研究工作已经展开.文中介绍了此类材料抑制隧穿效应影响的原理和其应当满足的各项性能指标.并对目前几种主要的研究方案,如几种高介电常数金属氧化物、硅酸盐及其迭层结构的研究状况和优缺点给予了简要评述.     

呼之欲出的新一代MOS栅极电介质材料

传统的ＳｉＯ２栅极电介质材料无法克服ＭＯＳ年特征尺度缩小带来的量子隧穿效应的影响,作为进上步提高微电子器件集成度的途径,利用新一代具有高介电常数的栅极电介质材料取代ＳｉＯ２的研究工作已经展开,文中介绍了此类材料抑制隧穿效应的原理和其应当满足的各项性能指标,并对目前几种主要的研究方案,如几种高介电常数金属氧化物、硅酸盐及其迭层结构的研究状况和优缺点给予也简要评述。     

金属/有机半导体界面偶极层的研究

利用金属/无机半导体界面模型对金属/有机半导体界面偶极层进行了数值研究.讨论了界面处金属/有机半导体原子间距与化学键密度对界面偶极能的影响;分析了界面层电场强度随化学键密度变化的原因;对界面偶极能与金属功函数之间的关系给出了合理的解释.     

硅基集成电路的发展和新一代栅极氧化物材料的研究现状

随着科学技术的进步和集成电路市场日益扩大的需求，硅基集成电路的集成度越来越高，而集成度的提高是以其核心器件金属氧化物半导体场效应晶体管(MOSFET)的特征尺寸逐渐减小为基础的。当栅极Si02介电层的厚度减小到原子尺度大小时，由于量子效应的影响，Si02将失去介电特性，因此必须寻找一种新的高介电常数(high—K)的氧化物材料来代替它。如今世界上许多国家都开展了替代Si02的介电氧化物材料的研究工作。文章介绍了栅极介电层厚度减小带来的影响，栅极Si02介电层的高尺氧化物材料的要求和租选，并对近期高介电常数氧化物材料的研究状况作了简要的介绍和评述。     

Y掺杂Al2O3高k栅介质薄膜的制备及性能研究

利用射频反应共溅射方法制备了Y掺杂Al₂O₃电介质薄膜，用掠入射x射线衍射检测了薄膜的结构，用高分辨率扫描电子显微镜(HRSEM)、原子力显微镜(AFM)观察了薄膜断面和表面形貌，用高频C-V和变频C-V及J-V测量了样品的电学特性. 结果表明，Y的掺入使电介质薄膜的介电常数k有了很大提高(8.14—11.8)，并体现出了较好的介电特性. 分析认为：与氧具有较大电负性差的Y离子的加入，增大了薄膜中的金属—氧键(M—O)的强度；同时，Y的加入使Al₂O₃的结构和原子配位发生了改变，从而提高了离子极化对薄膜介电常数的贡献. 退火前后的XRD谱均显示薄膜为非晶态；HRSEM断面和AFM形貌像显示所制备的薄膜非常平整，能够满足器件要求. 关键词： 高k栅介质 掺杂氧化铝 射频反应溅射     

Y掺杂Al2O3高k栅介质薄膜的制备及性能研究

利用射频反应共溅射方法制备了Y掺杂Al2O3电介质薄膜,用掠入射x射线衍射检测了薄膜的结构,用高分辨率扫描电子显微镜(HRSEM)、原子力显微镜(AFM)观察了薄膜断面和表面形貌,用高频C-V和变频C-V及J-V测量了样品的电学特性.结果表明,Y的掺入使电介质薄膜的介电常数k有了很大提高(8.14-11.8),并体现出了较好的介电特性.分析认为:与氧具有较大电负性差的Y离子的加入,增大了薄膜中的金属-氧键(M-O)的强度;同时,Y的加入使Al2O3的结构和原子配位发生了改变,从而提高了离子极化对薄膜介电常数的贡献.退火前后的XRD谱均显示薄膜为非晶态;HRSEM断面和AFM形貌像显示所制备的薄膜非常平整,能够满足器件要求.     

Ni全硅化金属栅功函数调节技术研究

通过制备栅内不同掺杂条件的Ni全硅化金属栅电容并分析其C-V和V_fb-EOT特性发现,Ga和Yb较常规的杂质而言具有更好的栅功函数调节能力,能够分别将Ni全硅化金属栅电极功函数调节到价带顶和导带底附近,满足高性能体硅平面互补金属氧化物半导体(CMOS)器件对栅电极功函数的要求. 同时根据电偶极子(Dipole)理论分析了Ga和Yb具有较强栅功函数调节能力的原因. 另外,研究发现栅内掺入Ga或Yb杂质后的Ni全硅化金属栅电容的电容值变大、栅极泄漏电流反而变小,通过对C-V和栅极泄漏电流特性进行分析,对这一现象进行了解释. 关键词： 金属栅电极 功函数 硅化物     

Implementation of nanoscale circuits using dual metal gate engineered nanowire MOSFET with high-k dielectrics for low power applications

This work covers the impact of dual metal gate engineered Junctionless MOSFET with various high-k dielectric in Nanoscale circuits for low power applications. Due to gate engineering in junctionless MOSFET, graded potential is obtained and results in higher electron velocity of about 31% for HfO₂ than SiO₂ in the channel region, which in turn improves the carrier transport efficiency. The simulation is done using sentaurus TCAD, ON current, OFF current, I_ON/I_OFF ratio, DIBL, gain, transconductance and transconductance generation factor parameters are analysed. When using HfO₂, DIBL shows a reduction of 61.5% over SiO₂. The transconductance and transconductance generation factor shows an improvement of 44% and 35% respectively. The gain and output resistance also shows considerable improvement with high-k dielectrics. Using this device, inverter circuit is implemented with different high-k dielectric material and delay have been decreased by 4% with HfO₂ when compared to SiO₂. In addition, a significant reduction in power dissipation of the inverter circuit is obtained with high-k dielectric Dual Metal Surround Gate Junctionless Transistor than SiO₂ based device. From the analysis, it is found that HfO₂ will be a better alternative for the future nanoscale device.     

电化学超级电容器电极材料的研究进展

超级电容器是一种利用电化学双电层储能或在电极材料表面及近表面发生快速可逆氧化还原反应而储能的装置,具有高的比功率、比能量和长的循环寿命.文章综述了超级电容器电极材料的储能机理、特点及应用,并重点介绍了石墨烯、二氧化锰及其复合电极材料在超级电容器中应用的最新研究进展.     

Flexible semi‐transparent silicon (100) fabric with high‐k/metal gate devices

Can we build a flexible and transparent truly high performance computer? High‐k/metal gate stack based metal–oxide–semiconductor capacitor devices are monolithically fabricated on industry's most widely used low‐cost bulk single‐crystalline silicon (100) wafers and then released as continuous, mechanically flexible, optically semi‐transparent and high thermal budget compatible silicon fabric with devices. This is the first ever demonstration with this set of materials which allows full degree of freedom to fabricate nanoelectronics devices using state‐of‐the‐art CMOS compatible processes and then to utilize them in an unprecedented way for wide deployment over nearly any kind of shape and architecture surfaces. Electrical characterization shows uncompromising performance of post release devices. Mechanical characterization shows extra‐ordinary flexibility (minimum bending radius of 1 cm) making this generic process attractive to extend the horizon of flexible electronics for truly high performance computers.

     

Analysis of flatband voltage shift of metallhigh-k/Si02/Si stack based on energy band alignment of entire gate stack

A theoretical model of flatband voltage （VFB） of metal/high-k/Si02/Si stack is proposed based on band alignment of entire gate stack, i.e., the VFB is obtained by simultaneously considering band alignments of metal/high-k, high-k/SiO2 and SiO2/Si interfaces, and their interactions. Then the VFB of TiN/HfO2/SiO2/Si stack is experimentally obtained and theoretically investigated by this model. The theoretical calculations are in good agreement with the experimental results. Furthermore, both positive VFB shift of TiN/HfO2/SiO2/Si stack and Fermi level pinning are successfully interpreted and attributed to the dielectric contact induced gap states at TiN/HfO2 and HfO2/SiO2 interfaces.     

Channel length scaling and the impact of metal gate work function on the performance of double gate-metal oxide semiconductor field-effect transistors

In this paper, we study the effects of short channel on double gate MOSFETs. We evaluate the variation of the threshold voltage, the subthreshold slope, the leakage current and the drain-induced barrier lowering when channel length L _CH decreases. Furthermore, quantum effects on the performance of DG-MOSFETs are addressed and discussed. We also study the influence of metal gate work function on the performance of nanoscale MOSFETs. We use a self-consistent Poisson-Schrödinger solver in two dimensions over the entire device. A good agreement with numerical simulation results is obtained.     

Significantly reduced leakage currents in organic thin film transistors with Mn‐doped Bi2Ti2O7 high‐k gate dielectrics

We report the fabrication of organic thin‐film transistors (OTFTs) with high‐k gate dielectrics of Mn‐doped Bi₂Ti₂O₇ (BTO) films. 3% Mn‐doped BTO films deposited on polymer substrates by pulsed laser deposition at room temperature exhibit low leakage currents of 2.1 × 10^–8 A/cm² at an applied electric field of 0.3 MV/cm, while undoped BTO films show much higher leakage currents of 4.3 × 10^–4 A/cm². Mn doping effectively reduces the number of oxygen vacancies in the films and improves the electrical properties. Low operation voltage and significantly reduced leakage currents are demonstrated in pentacene‐based OTFTs with the Mn‐doped BTO gate dielectrics. (© 2012 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)