全局快门CMOS图像传感器研究进展

全局快门CMOS图像传感器广泛应用于高速运动物体的成像,包括机器视觉、工业测量、航空航天,以及军事应用等领域.介绍了全局快门CMOS图像传感器的主要类型,具体分析了灵敏度、寄生光灵敏度、读出噪声、动态范围和帧频等性能参数的研究进展.最后对国内外有代表性的全局快门CMOS图像传感器产品进行了介绍.     

A Dual-Capture Wide Dynamic Range CMOS Image Sensor Using Floating-Diffusion Capacitor

A dual-capture wide dynamic range CMOS image sensor using an in-pixel floating-diffusion (FD) storage capacitor is proposed. The proposed structure uses the FD as a storage capacitor. The potential of the FD node is read out using a floating-gate capacitor without a contact metallization of the FD node to reduce the leakage. The proposed sensor was fabricated using a 0.35-mum CMOS process. The chip includes 320 times 240 pixels whose pitch is 5.6 mum and whose fill factor is 36%. The measurement results show 100-dB dynamic range, and the leakage at the non-metalized FD is reduced to about one-third of that of the conventional FD with the contact metallization.     

一种梯度自适应宽动态CMOS图像传感器像素结构

提出了一种梯度自适应的宽动态CMOS图像传感器像素结构。该像素结构采用多路分流设计,改变了3T-APS图像传感器的单线性响应率;根据不同的光照强度自适应调整响应率,在低照度时具有较大的响应率,在高照度时具有较小的响应率,从而增大了像素的动态范围。该像素结构简单,无需额外复杂的控制电路即可实现对光照强度的自适应梯度响应。基于0.18 μm 1P4M SMIC工艺,采用SILVACO TCAD仿真软件进行电路设计和仿真。结果表明,该CMOS图像传感器像素结构电路的动态范围可达到112.36 dB。     

320×240 Pixels CMOS Digital Image Sensor with Wide Dynamic Range

A 320×240 CMOS image sensor is demonstrated,which is implemented by a standard 0.6 μm 2P2M CMOS process.For reducing the chip area,each 2×2-pixel block shares a sample/hold circuit,analog-to-digital converter and 1-b memory.The 2×2 pixel pitch has an area of 40 μm×40 μm and the fill factor is about 16%.While operating at a low frame rate,the sensor dissipates a very low power by power-management circuit making pixel-level comparators in an idle state.A digital correlated double sampling,which eliminates fixed pattern noise,improves SNR of the sensor, and multiple sampling operations make the sensor have a wide dynamic range.     

320×240 Pixels CMOS Digital Image Sensor with Wide Dynamic Range

A 320×240 CMOS image sensor is demonstrated,which is implemented by a standard 0.6 μm 2P2M CMOS process.For reducing the chip area,each 2×2-pixel block shares a sample/hold circuit,analog-to-digital converter and 1-b memory.The 2×2 pixel pitch has an area of 40 μm×40 μm and the fill factor is about 16%.While operating at a low frame rate,the sensor dissipates a very low power by power-management circuit making pixel-level comparators in an idle state.A digital correlated double sampling,which eliminates fixed pattern noise,improves SNR of the sensor, and multiple sampling operations make the sensor have a wide dynamic range.     

A High Dynamic Range CMOS Image Sensor With Inpixel Light-to-Frequency Conversion

A high dynamic range CMOS image sensor with inpixel light-to-frequency conversion has been designed. The prototype chip was fabricated in a standard 0.18-mum single-poly six-metal CMOS technology. The experimental results show that, operating at 1.2 V, the sensor can achieve a linear dynamic range of over 115 dB and an overall dynamic range of over 130 dB     

An Improved Global Shutter Pixel with Extended Output Range and Linearity of Compensation for CMOS Image Sensor

An improved global shutter pixel structure with extended output range and linearity of compensation is proposed for CMOS image sensor. The potential switching of the sample and hold capacitor bottom plate outside the array is used to solve the problem of the serious swing limitation, which will attenuate the dynamic range of the image sensor. The non-linear problem caused by the substrate bias effect in the output process of the pixel source follower is solved by using the mirror FD point negative feedback self-establishment technology outside the array. The approach proposed in this paper has been verified in a global shutter CMOS image sensor with a scale of 1024×1024 pixels. The test results show that the output range is expanded from 0.95V to 2V, and the error introduced by the nonlinearity is sharply reduced from 280mV to 0.3mV. Most importantly, the output range expansion circuit does not increase the additional pixel area and the power consumption. The power consumption of linearity correction circuit is only 23.1μW, accounting for less than 0.01％ of the whole chip power consumption.     

A 120-dB Dynamic Range CMOS Image Sensor With Programmable Power Responsivity

A high dynamic range CMOS image sensor providing a user-programmable power responsivity curve is presented. Each pixel integrates, besides a 4T active pixel structure, a voltage comparator and an analog memory to implement a time-to-saturation scheme while also providing the standard integrated photo-current signal. The sensor generates two 10-bit analog outputs allowing a typical dynamic range exceeding 120 dB with a temporal noise lower than 0.13% and a fixed pattern noise of 0.4% (1.7%) of the total signal swing (2 V) at low (high) irradiance without any external calibration procedures. A 140 times 140-pixel array has been fabricated in a 0.35-mum, two-poly four-metal (2P4M), 3.3-V standard CMOS technology. The chip measures 3.9 times 4.6 mm² with a pixel pitch of 15 mum and a fill factor of 20%.     

低功耗高动态范围CMOS图像传感器的设计

设计了一种低功耗高动态范围的CMOS图像传感器16×16像素阵列电路,采用条件重置的方法,钟控比较器的低功耗设计及相关时序电路的优化,在扩展CMOS图像传感器的动态范围下,极大地降低了系统的功耗.实验表明,基于标准CSM 0.35μm 2P4M CMOS工艺,用HSPICE仿真,动态范围最大可以达到普通传感器的4倍,在3.3 V下每列功耗仅为6.6μW.     

高帧频大动态范围CMOS图像传感器时序控制电路的设计与实现

本文主要论述了CMOS图像传感器时序控制电路的系统设计和实现方法.针对双采样结构的图像传感器,分析了常用的并行式曝光方式和滚筒式曝光方式两种时序控制方法及其具体实现过程,并根据时序控制电路的功能仿真和在FPGA上的验证结果,对二者进行了比较,证明了这两种方法的可行性.     

Sub-1-V Supply Self-Adaptive CMOS Image Sensor Cell With 86-dB Dynamic Range

This letter presents a high dynamic range CMOS active pixel structure operating at a sub-1-V supply voltage, which is implemented using a standard 0.18-mum CMOS logic process. In order to improve the output voltage swing range and associated pixel dynamic range at a low supply voltage, a pMOS reset structure is incorporated into the pixel structure along with a photogate pixel structure based on the self-adaptive photosensing operation. At a low supply voltage of 0.9 V, the new pixel provides an output voltage swing range of 0.41 V and a high dynamic range of 86 dB, which is the highest among the reported pixel structures up to date operating at sub-1-V     

一个提高CMOS图像传感器的动态范围的算法

文章提出了一种新的提高CIOS图像传感器动态范围的算法。这种算法在每个传感器像素的积分期间，以时间间隔的指数方式进行采样，比较采样值和参考电压，若采样值小于参考电压，则将采样值输出。采用这种算法．当在每个积分周期采样N次时，最大可以提高CIOS图像传感器的动态范围2^N-1倍。     

Extended Dynamic Range From a Combined Linear-Logarithmic CMOS Image Sensor

A CMOS image sensor that can operate in both linear and logarithmic mode is described. Two sets of data are acquired and combined in the readout path to render a high dynamic range image. This is accomplished in real-time without the use of frame memory. A dynamic range in excess of 120 dB was achieved at 26 frames/s (352$,times ,$288-array). The system addresses the problems of high fixed pattern noise (FPN), slow response time, and low signal-to-noise ratio (SNR) in logarithmic mode. FPN has been effectively reduced by single and two parameter calibration, the latter achieving FPN of 2% per decade. A novel on-chip method of deriving a reference point has been implemented. The system is fabricated in a 0.18-$mu$m 1P4M process and achieves a pixel pitch of 5.6$muhbox m$with 7 transistors per pixel.     

宽动态测量范围的光纤液体浓度传感器

液体浓度变化引起折射率变化,利用测量光学材料折射率的V型棱镜法原理,可在较宽的动态范围内测量液体的浓度。     

基于时间域读出的大动态范围CMOS图像传感器

设计了一款基于时间域读出的大动态范围CMOS图像传感器。传感器基于一种新型的结构,其可在时间域下探测高输入光强,在模拟域下探测低输入光强。该设计在传统电容反馈式跨阻放大器(CTIA)的基础上,新增了时间域测量电路,在不改变原有积分过程的同时可实现连续的大动态范围。基于0.35μm,5V-CMOS工艺进行了256×1线列CMOS图像传感器流片,光电二极管面积为22.5μm×22.5μm,并对器件的光电特性进行了后仿真验证。仿真测试结果表明,基于时间域读出的图像传感器可实现96dB的大动态范围,且时间域和模拟域的两路输出信号可同步输出,功耗为7.98mW。     

A High-Speed, High-Sensitivity Digital CMOS Image Sensor With a Global Shutter and 12-bit Column-Parallel Cyclic A/D Converters

This paper presents a high-speed, high-sensitivity 512times512 CMOS image sensor with column parallel cyclic 12-bit ADCs and a global electronic shutter. Each pixel has a charge amplifier for high charge-to-voltage conversion gain despite of using a large-size photodiode, and two sample-and-hold stages for the global shutter and fixed pattern noise (FPN) canceling. High-speed column-parallel cyclic ADC arrays with 12-bit resolution having a small layout size of 0.09 mm ² are integrated at both sides of image array. A technique for accelerating the conversion speed using variable clocking and sampling capacitance is developed. A digital gain control function using 14-bit temporal digital code is also set in the column parallel ADC. The fabricated chip in 0.25-mum CMOS image sensor technology achieves the full frame rate in excess of 3500 frames/s. The in-pixel charge amplifier achieves the optical sensitivity of 19.9 V/lxmiddots. The signal full scale at the pixel output is 1.8 V at 3.3-V supply and the noise level is measured to be 1.8mV_rms, and the resulting signal dynamic range is 60 dB     

一种适用于昼夜兼容CMOS图像传感器的动态范围拓展方法

为了提高CMOS图像传感器的动态范围并应用于昼夜兼容成像,提出了一种新的动态范围拓展方法。该方法在像素中设置多个复位屏障,以延长曝光过程中光电二极管的饱和时间,同时通过在不同成像环境中切换像素积分电容大小,提高微光成像时的响应灵敏度和强光成像时的满阱容量,从而实现昼夜兼容高动态成像。经MATLAB仿真证明,该方法可将传统CMOS图像传感器的动态范围从61 dB拓展到102 dB。     

一种大量程低误差CMOS温度传感器

温度传感器是将温度信号转换为电信号的元件。CMOS工艺制作的温度传感器具有面积小、成本低的优点,精度和工作温度范围是CMOS温度传感器最重要的两个指标。设计了一种工作温度范围为－45 ℃~125 ℃,测量精度为±1.5 ℃的温度传感器,主要包括温度传感电路和后端Σ-Δ ADC两部分,设计时采用了曲率校正、动态匹配等多重误差的校正方法。     

Wide Dynamic Range CMOS Pseudo-differential Current Conveyors: CMOS Realizations and Applications

This paper presents two new CMOS realization circuits of the pseudo-differential current conveyor (PDCC) in which the second realization is a modified version of the first one. The modified PDCC has a wide dynamic input and output ranges with low distortion. The PDCC CMOS circuits are formed from two stages, input stage and output stage, and operating under a supply voltage of ±1.5 V. The input stage of the PDCC is realized using two wide linear range transconductors, and the output stage consists of a class AB push-pull network, which guarantees high current driving capability and low standby current. The first realization of PDCC exhibits dynamic input range of ±1.4 V with a total standby power dissipation of 4.08 mW, while the second realization of the PDCC exhibits a wide dynamic input range of ±2.1 V with a total standby power dissipation of 3.68 mW. The PDCC is used to realize mixed-mode fully differential VGA and a differential-mode bandpass filter. PSPICE simulations of the proposed PDCC and its based applications are given using 0.25-μm CMOS technology from TMSC MOSIS.     

A Wide Dynamic-Range CMOS Image Sensor Using Self-Reset Technique

A wide dynamic-range (DR) pixel-level CMOS image sensor with self-reset technique has been fabricated using a 0.18-mum six-metal CMOS technology and tested to verify simultaneous increase of both DR and peak signal-to-noise ratio (SNR). It provides a continuous peak SNR enhancement over a strong incident light range. Maximum achievable DR is measured over 71.1 dB, and SNR keeps increasing at 7.3 dB/decade beyond conventional CMOS image sensors.