基于多铁纳磁体的择多逻辑门三维磁化动态特性研究

建立了多铁纳磁体择多逻辑门的三维磁化动态模型,并施加应变时钟(应力或电压)对多铁择多逻辑门的择多计算功能进行了动态仿真,同时分析了应变时钟工作机制以及它与择多逻辑门可靠转换之间的关系.仿真结果表明所建三维动态模型准确地描述了择多逻辑门的工作机制,在30 MPa应力作用下,择多逻辑门接受新输入实现了正确的择多计算功能.研究还发现对中心纳磁体和输出纳磁体依次撤去应变时钟时,提前撤去输出纳磁体上的应力会降低择多逻辑门的正确计算概率,而延迟撤去输出纳磁体上的应力会降低择多逻辑门的工作频率.研究结果深化了人们对多铁择多逻辑门动态特性的认识,可为多铁逻辑电路的设计提供重要指导.     

Total ionizing radiation-induced read bit-errors in toggle magnetoresistive random-access memory devices

The 1-Mb and 4-Mb commercial toggle magnetoresistive random-access memories(MRAMs) with 0.13 μm and 0.18-μm complementary metal–oxide–semiconductor(CMOS) process respectively and different magnetic tunneling junctions(MTJs) are irradiated with a Cobalt-60 gamma source. The electrical functions of devices during the irradiation and the room temperature annealing behavior are measured. Electrical failures are observed until the dose accumulates to 120-krad(Si) in 4-Mb MRAM while the 1-Mb MRAM keeps normal. Thus, the 0.13-μm process circuit exhibits better radiation tolerance than the 0.18-μm process circuit. However, a small quantity of read bit-errors randomly occurs only in 1-Mb MRAM during the irradiation while their electrical function is normal. It indicates that the store states of MTJ may be influenced by gamma radiation, although the electrical transport and magnetic properties are inherently immune to the radiation. We propose that the magnetic Compton scattering in the interaction of gamma ray with magnetic free layer may be the origin of the read bit-errors. Our results are useful for MRAM toward space application.     

基于倾斜纳磁体翻转倾向性的与(或)逻辑门应力模型

纳米磁性逻辑器件具有高抗辐射性、低功率、天然非易失性等优势,应用前景广阔.倾斜放置的纳磁体具有翻转倾向性,在控制时钟撤去后倾斜纳磁体倾向于翻转至长轴的一端.利用倾斜纳磁体的翻转倾向性,提出了一种应力调控的与(或)磁逻辑门,并建立了其动态磁化的数学模型.使用微磁学方法对逻辑门进行了仿真,结果验证了预期逻辑门功能.与现有的逻辑门相比,基于倾斜纳磁体的与(或)门结构具有能耗更低、可靠性更高和制造工艺更简单等优点.     

An Optimized Three-Level Design of Decoder Based on Nanoscale Quantum-Dot Cellular Automata

Quantum-dot Cellular Automata (QCA) has been potentially considered as a supersede to Complementary Metal–Oxide–Semiconductor (CMOS) because of its inherent advantages. Many QCA-based logic circuits with smaller feature size, improved operating frequency, and lower power consumption than CMOS have been offered. This technology works based on electron relations inside quantum-dots. Due to the importance of designing an optimized decoder in any digital circuit, in this paper, we design, implement and simulate a new 2-to-4 decoder based on QCA with low delay, area, and complexity. The logic functionality of the 2-to-4 decoder is verified using the QCADesigner tool. The results have shown that the proposed QCA-based decoder has high performance in terms of a number of cells, covered area, and time delay. Due to the lower clock pulse frequency, the proposed 2-to-4 decoder is helpful for building QCA-based sequential digital circuits with high performance.     

Modular Adder Designs Using Optimal Reversible and Fault Tolerant Gates in Field-Coupled QCA Nanocomputing

The challenges which the CMOS technology is facing toward the end of the technology roadmap calls for an investigation of various logical and technological solutions to CMOS at the nano scale. Two such paradigms which are considered in this paper are the reversible logic and the quantum-dot cellular automata (QCA) nanotechnology. Firstly, a new 3 × 3 reversible and universal gate, RG-QCA, is proposed and implemented in QCA technology using conventional 3-input majority voter based logic. Further the gate is optimized by using explicit interaction of cells and this optimized gate is then used to design an optimized modular full adder in QCA. Another configuration of RG-QCA gate, CRG-QCA, is then proposed which is a 4 × 4 gate and includes the fault tolerant characteristics and parity preserving nature. The proposed CRG-QCA gate is then tested to design a fault tolerant full adder circuit. Extensive comparisons of gate and adder circuits are drawn with the existing literature and it is envisaged that our proposed designs perform better and are cost efficient in QCA technology.     

THz detectors based on Si-CMOS technology field effect transistors – advantages,limitations and perspectives for THz imaging and spectroscopy

Recent advances in THz detection with the use of CMOS technology have shown that this option has the potential to be a leading method of producing low-cost THz sensors with integrated readout systems. This review paper, based on authors’ years of experience, presents strengths and weaknesses of this solution. The article gives examples of some hints, regarding radiation coupling and readout systems. It shows that silicon CMOS technology is well adapted to the production of inexpensive imaging systems for sub-THz frequencies. As an example paper presents the demonstrator of a multipixel Si-CMOS THz spectroscopic system allowing for chemical identification of lactose. The THz detectors embedded in this system were manufactured using the CMOS process.     

Performance limits of CMOS technology and perspectives of quantum devices

In this work we examine the performance limits of CMOS technology in the nanometer regime. The starting point of our discussion is the 1999 International Technology Roadmap for Semiconductors, which represents the current view of Industry on the future evolution and prospects of microelectronics. Next, we shortly address the physical principles of single-electron devices, and speculate on the opportunities offered by them for the implementation of single-electron circuits for logic and memory applications.     

Optical characterization methods for solid-state image sensors

The accurate measurement of the optoelectronic properties of imaging sensors is of utmost importance for their appropriate use in various modern application fields, such as in metrology, quality control, environmental monitoring, medicine or for automotive applications. Key sensor parameters include spatial resolution, uniformity, sensitivity, linearity, signal to noise ratio and dynamic range. Today high-end optical systems mostly rely on charge coupled device (CCD) image sensors. Continuous progresses in CMOS submicron technology and the advent of ‘active pixel sensor’ (APS) imagers have however led to a wealth of novel line and area array imaging devices with added functionalities (eg. on-chip control and read-out electronics) or performance optimized for specific tasks (eg. a dynamic range in excess of 120 dB). The optimal use of CMOS image sensing technology nevertheless depends strongly on the absolute and accurate optoelectronic characterization of these devices. Modern measurement techniques for a reliable, traceable, precise and absolute measurement of the most relevant parameters of CCD and CMOS imaging sensors are described and discussed in the present paper, with examples based on recent state-of-the art CMOS imagers.     

高精度可搬运钙离子光钟

时间的计量一直是人们所关心的基本问题,它与人们的日常生产生活息息相关.随着科学技术的发展与进步,人类对时间的计量也越来越精确.近年来,光钟已经成为当前世界上最精确的计时工具.然而,往往因体积庞大、仅能在实验室环境工作,极大地限制了光钟的应用范围.实现可搬运、可靠、准连续运行的高精度光钟是科学家的愿望,也是对光钟科研工作...     

An approach to measurement

We present a new approach to measurement theory. Our definition of measurement is motivated by direct laboratory procedures as they are carried out in practice. The theory is developed within the quantum logic framework. This work clarifies an important problem in the quantum logic approach; namely, where the Hilbert space comes from. We consider the relationship between measurements and observables, and present a Hilbert space embedding theorem. We conclude with a discussion of charge systems.     

Atom optics with hollow optical systems

Recent theoretical as well as experimental progress in atom optics using optical means—in particular, hollow optical systems such as pyramidal hollow mirror, conical hollow mirror, and hollow-core optical fiber—are presented. These hollow optical systems provide the dark hollow region where atoms can be manipulated in a way so as to minimize the external perturbations due to the optical fields once the atoms are cooled and trapped. Therefore, such systems provide very simple and reliable ways of preparing precooled atoms for further elaborate atom optics experiments and also for introducing them efficiently into low-dimensional space, such as the 2D atomic channel or the 1D atomic wire.     

Cryogenically Cooled CMOS

The factors affecting the feasibility of cryogenically cooled CMOS are reviewed. This approach becomes more attractive as CMOS feature sizes shrink below 250?nm where chip performance is limited by interconnect characteristics. The impact of interconnects is demonstrated using a methodology for estimating interconnect-limited CMOS performance. The cryogenic behavior of normal and superconducting interconnects is reviewed. Cooling the best normal interconnect metals such as Al or Cu to 77?K can produce 9×lower resistivity. High-temperature superconductors can produce lower resistance at GHz clock frequencies, but would be difficult to produce on low dielectric substrates compatible with silicon technology. Performance doubling has been demonstrated for CMOS circuits operating at liquid nitrogen temperature. Comparable performance improvements may be expected down to below 100?nm if process technology is adjusted appropriately. In addition, dramatic increases in DRAM storage times result from exponential decreases in subthreshold leakage currents. Circuit reliability should increase correspondingly, apart from hot-carrier induced degradation. Thermally efficient packages and refrigerators are required for cryogenic CMOS. Microchannel heat exchangers can produce thermally efficient cryogenic packages. However, thermodynamic limits to refrigerator performance may make operation at higher cryogenic temperatures more attractive.     

Nanosatellites for quantum science and technology

Bringing quantum science and technology to the space frontier offers exciting prospects for both fundamental physics and applications such as long-range secure communication and space-borne quantum probes for inertial sensing with enhanced accuracy and sensitivity. But despite important terrestrial pathfinding precursors on common microgravity platforms and promising proposals to exploit the significant advantages of space quantum missions, large-scale quantum test beds in space are yet to be realised due to the high costs and lead times of traditional ‘Big Space’ satellite development. But the ‘small space’ revolution, spearheaded by the rise of nanosatellites such as CubeSats, is an opportunity to greatly accelerate the progress of quantum space missions by providing easy and affordable access to space and encouraging agile development. We review space quantum science and technology, CubeSats and their rapidly developing capabilities and how they can be used to advance quantum satellite systems.     

Design, characterization and evaluation of high performance 2.8 μm pitch zero space microlens

Utilization of the zero space microlens technology can significantly improve the image quality of CMOS sensors. In this study, we present systematical data of design, simulation, characterization and silicon level testing during the initial stage of development of the zero space microlens based CMOS imaging technology. The optimal structure of zero space microlens was obtained based on the simulation results. Sample CMOS image sensors with a 2.8 μm pitch zero space microlens above each pixel have been successfully fabricated based on 0.18 μm CMOS technology. Using AFM (atomic force microscopy) and sensor test platform, the structural and optical properties of both space microlens and zero space microlens have been characterized, and their performances have been evaluated respectively. Both AFM results and silicon tests have demonstrated that the 2.8 μm pitch zero space microlens can remarkably improve the pixel sensitivity and pixel array non-uniformity, and reduce the optical crosstalk. Compared to the space 2.8 μm square microlens, the zero space microlens shows 78.83% (68.42% and 75.93%) enhancement of photosensitivity and increment of pixel non-uniformity up to 20% (45.6% and 30.77%) for R (G and B), and reduction of the optical crosstalk up to 44.49%, under 45 lux light and 30 ms exposure time. In addition, the zero space microlens has also shown a great potential in further reducing pixel size down to less than 2.8 μm and meanwhile improving imaging performance of CMOS image sensors.     

Sensitivity to parameters of STIRAP in a Cooper Pair Box

The rapid experimental progress in the field of superconducting nanocircuits gives rise to an increasing quest for advanced quantum-control techniques for these macroscopically coherent systems. Here we demonstrate theoretically that stimulated Raman adiabatic passage (STIRAP), a well-established method in quantum optics, should be possible with the quantronium setup of a Cooper-pair box. We find the parameters which optimize the procedure and show how the scheme appears to be robust against decoherence and should be realizable even with the existing technology.     

The effect of body bias of the metal-oxide-semiconductor field-effect transistor in the resistive network on spatial current distribution in a bio-inspired complementary metal-oxide-semiconductor vision chip

Complementary metal-oxide-semiconductor (CMOS) vision chips for edge detection based on a resistive circuit have recently been developed. These chips help in the creation of neuromorphic systems of a compact size, high speed of operation, and low power dissipation. The output of the vision chip depends predominantly upon the electrical characteristics of the resistive network which consists of a resistive circuit. In this paper, the body effect of the metal-oxide-semiconductor field-effect transistor for current distribution in a resistive circuit is discussed with a simple model. In order to evaluate the model, two 160 × 120 CMOS vision chips have been fabricated using a standard CMOS technology. The experimental results nicely match our prediction.     

Low capacitance CMOS silicon photodetectors for optical clock injection

We have studied the response of CMOS compatible detectors fabricated in a silicon-on-sapphire (SOS) process, operated under short pulse excitation in the blue. These high speed, low capacitance detectors would be suitable for very precise, surface-normal clock injection with silicon CMOS. We characterize the capacitance of the detector structure through a combination of experimental techniques and circuit-level and electromagnetic simulations. The transit-time-limited response of the detectors is validated through pump–probe experiments. Detector response times of ∼35 ps have been measured, and devices have capacitance as low as ∼4 fF.     

Correlated Electron Materials and Field Effect Transistors for Logic: A Review

Correlated electron systems are among the centerpieces of modern condensed matter sciences, where many interesting physical phenomena, such as metal-insulator transition and high-T _c superconductivity appear. Recent efforts have been focused on electrostatic doping of such materials to probe the underlying physics without introducing disorder as well as to build field-effect transistors that may complement conventional semiconductor metal-oxide-semiconductor field effect transistor (MOSFET) technology. This review focuses on metal-insulator transition mechanisms in correlated electron materials and three-terminal field effect devices utilizing such correlated oxides as the channel layer. We first describe how electron-disorder interaction, electron-phonon interaction, and/or electron correlation in solids could modify the electronic properties of materials and lead to metal-insulator transitions. Then we analyze experimental efforts toward utilizing these transitions in field effect transistors and their underlying principles. It is pointed out that correlated electron systems show promise among these various materials displaying phase transitions for logic technologies. Furthermore, novel phenomena emerging from electronic correlation could enable new functionalities in field effect devices. We then briefly review unconventional electrostatic gating techniques, such as ionic liquid gating and ferroelectric gating, which enables ultra large carrier accumulation density in the correlated materials which could in turn lead to phase transitions. The review concludes with a brief discussion on the prospects and suggestions for future research directions in correlated oxide electronics for information processing.     

一种新型的FPGA实现RS422串口通信方法

在FPGA实现RS422串口通信的常用方法中经常遇到诸多问题,如FIFO深度读取不正确、FIFO写数据端口与读数据端口时序竞争、多个模块间信号延时导致FPGA亚稳态等问题,因此设计了一种新型的RS422串口通信实现方法;该方法通过利用寄存器数组作为循环缓存代替FIFO,利用计数器代替传统的波特率产生模块,把常用方法中的多个模块整合成一个模块,只采用一个主时钟,所有寄存器的时钟输入端共享一个时钟,对FPGA逻辑与时序进行了有效约束,避免了FPGA中亚稳态产生;试验结果表明该方法实现的RS422串口通信高速、可靠、稳定,并且利用FPGA实现RS422串口通信,可使整个系统更为灵活、紧凑,减小整个电路的体积,提高系统的可靠性和稳定性。     

A simplified optical lattice clock

Existing optical lattice clocks demonstrate a high level of performance but they remain complex experimental devices. In order to address a wider range of applications including those requiring transportable devices, it will be necessary to simplify the laser systems and reduce the amount of support hardware. Here we demonstrate two significant steps towards this goal: demonstration of clock signals from a Sr lattice clock based solely on semiconductor laser technology, and a method for finding the clock transition (based on a coincidence in atomic wavelengths) that removes the need for extensive frequency metrology hardware. Moreover, the unexpected high contrast in the signal revealed evidence of density dependent collisions in ⁸⁸Sr atoms.