首页 | 本学科首页   官方微博 | 高级检索  
相似文献
 共查询到20条相似文献,搜索用时 14 毫秒
1.
The stability of nickel-based silicides integrated in CMOS circuits has been studied. The evolution of transistor electrical failures is then reported, linked to Ni abnormal migration through different process steps. We have found in our studies that Ni encroachment is not only due to NiSi2 clusters formation but also to NiSi precipitates formation. Silicon substrate doping, surface preparation, nickel film thickness and the thermal treatments were identified to modify occurrences of this randomly localized phenomenon. Ni-rich phase initial formation is preferable to prevent Ni encroachment even though other upstream process steps for CMOS integration are also key for Ni migration control.  相似文献   

2.
The formation of Mg2Si(100), ao= 6.39Å, on Si(100) substrates has been investigated. Mg was first evaporated onto Si(100) surfaces and Mg2Si (100) films were formed in a subsequent annealing process. The Mg2Si layers were characterized by x-ray diffraction and transmission electron microscopy analysis. Optical and scanning electron microscopy analysis show the surface morphology to be smooth. The films are stable under thermal cycling and exhibit low resistivity. Epitaxial films of Mg2Si on Si(100) could be an ideal substrate for mercury cadmium telluride and antimonide based III-V semiconductor for mid-infrared devices because of its close lattice matching (the lattice misfit factor is less than 1.5%).  相似文献   

3.
Crack-free PbSe on (100)-oriented Si has been obtained by a combination of liquid phase epitaxy (LPE) and molecular beam epitaxy (MBE) techniques. MBE is employed first to grow a PbSe/BaF2/CaF2 buffer structure on the (100)-oriented Si. A 2.5 μm thick PbSe layer is then grown by LPE. The LPE-grown PbSe displays excellent surface morphology and is continuous over the entire 8×8 mm2 area of growth. This result is surprising because of the large mismatch in thermal expansion coefficients between PbSe and Si. Previous attempts to grow crack-free PbSe by MBE alone using similar buffer structures on (100)-oriented Si have been unsuccessful. It is speculated that the large concentration of Se vacancies in the LPE-grown PbSe layer may allow dislocation climb along higher order slip planes, providing strain relaxation.  相似文献   

4.
The influence of crystal damage on the electrical properties and the doping profile of the implanted p+–n junction has been studied at different annealing temperatures using process simulator TMA-SUPREM4. This was done by carrying out two different implantations; one with implantation dose of 1015 BF2+ ions/cm2 at an energy of 80 keV and other with 1015 B+ ions/cm2 at 17.93 keV. Substrate orientation 1 1 1 of phosphorus-doped n-type Si wafers of resistivity 4 kΩ cm and tilt 7° was used, and isochronally annealing was performed in N2 ambient for 180 min in temperature range between 400°C and 1350°C. The diode properties were analysed in terms of junction depth, sheet resistance. It has been found that for low thermal budget annealing, boron diffusion depth is insensitive to the variation in annealing temperature for BF2+-implanted devices, whereas, boron diffusion depth increases continuously for B+-implanted devices. In BF2+-implanted devices, fluorine diffusion improves the breakdown voltage of the silicon microstrip detector for annealing temperature upto 900°C.For high thermal budget annealing, it has been shown that the electrical characteristics of BF2+-implanted devices is similar to that obtained in B+-implanted devices.  相似文献   

5.
We have investigated the formation of TiSi2 and CoSi2 thin films on Si(100) substrates using laser (wave length 248 nm, pulse duration 40 ns and repetition rate 5 Hz) physical vapor deposition (LPVD). The films were deposited from solid targets of TiSi2 and CoSi2 in vacuum with the substrate temperature optimized at 600° C. The films were characterized using x-ray diffraction, scanning electron microscopy (SEM), transmission electron microscopy (TEM) and four point probe ac resistivity. The films were found to be polycrystalline with a texture. The room temperature resistivity was found to be 16 μΩ-@#@ cm and 23 μΩ-cm for TiSi2 and CoSi2 films, respectively. We optimized the processing parameters so as to get particulate free surface. TEM results show that the silicide/silicon interface is quite smooth and there is no perceptible interdiffusion across the interface.  相似文献   

6.
In this work, remote plasma-enhanced chemical vapor deposition (RPCVD) has been used to grow Ge x Si1−x /Si layers on Si(100) substrates at 450° C. The RPCVD technique, unlike conventional plasma CVD, uses an Ar (or He) plasma remote from the substrate to indirectly excite the reactant gases (SiH4 and GeH4) and drive the chemical deposition reactions. In situ reflection high energy electron diffraction, selected area diffraction, and plan-view and cross-sectional transmission electron microscopy (XTEM) were used to confirm the single crystallinity of these heterostructures, and secondary ion mass spectroscopy was used to verify abrupt transitions in the Ge profile. XTEM shows very uniform layer thicknesses in the quantum well structures, suggesting a Frank/ van der Merwe 2-D growth mechanism. The layers were found to be devoid of extended crystal defects such as misfit dislocations, dislocation loops, and stacking faults, within the TEM detection limits (∼105 dislocations/cm2). Ge x Si1−x /Si epitaxial films with various Ge mole fractions were grown, where the Ge contentx is linearly dependent on the GeH4 partial pressure in the gas phase for at leastx = 0 − 0.3. The incorporation rate of Ge from the gas phase was observed to be slightly higher than that of Si (1.3:1).  相似文献   

7.
Epitaxial growth of a metal (CoSi2) /insulator (CaF2) nanometer-thick layered structure on Si(111) was demonstrated and the resistivity of CoSi2 epilayer in this structure was investigated. An epitaxial CoSi2 layer on CaF2 was obtained by the two-step growth technique,i.e. solid phase epitaxy with the epitaxial Si layer grown in the first step and Co deposited in the second step. This technique was shown to be effective to avoid the Co agglomeration on CaF2 layer observed in the co-evaporation of Si and Co. An epitaxial CaF2 layer was formed on CoSi2/CaF2 at low substrate temperature (450°C) with partially ionized and accelerated CaF2 beam, to avoid Co agglomeration in the CoSi2/CaF2 underlayer as well. Obtained results showed a single-crystalline nature in reflection high-energy electron diffraction (RHEED) and transmission electron microscopy (TEM) observations. The resistivity of a few nm-thick CoSi2 epilayers embedded by CaF2 has been investigated. We studied thickness and annealing temperature dependence of resistivity and showed that a minimum resistivity of 30 μΩ cm was obtained in a 2 nm-thick CoSi2 sample annealed at 860°C.  相似文献   

8.
Nickel based silicide films were prepared by annealing nickel-platinum layers deposited on n doped Si substrates. We report on the evolution of the phase formation and the redistribution of contaminants on blanket wafers during silicide formation as a function of the nitrogen gas flow introduces during Ni(Pt) deposition. Nitrogen incorporation creates a contamination as-deposited layer which modifies phase formation and changes nickel diffusion. Nitrogen is not incorporated in silicide formed. After a second anneal, the monosilicide forms excepted for high nitrogen quantity introduced where the Ni3Si2 is always observed. Monosilicide thermal stability is also improved by nitrogen co-plasma.  相似文献   

9.
采用高温固相法合成了蓝色荧光粉KNaCa2(PO4)2:Eu2+,利用X射线衍射(XRD)和光谱技术等表征了材料的性能。结果显示,少量Eu 2+的掺入并没有影响KNaCa2(PO4)2的晶体结构。 在399nm近紫外光激发下,KNaCa2(PO4)2:Eu2+材料发 射蓝光,发射光谱为400~600nm, 主发射峰位于471nm,对应Eu2+的4f65d1→ 4f7跃迁发射;471nm发射峰,对应的激发光 谱为250~450nm,主激发峰位于399nm,与近紫外芯片匹配很好。 以365nm近紫外光作为 激发源时,KNaCa2(PO4)2:Eu2+材料的发射强度约为商用蓝色荧光粉BAM:Eu 2+的85%;而以 399nm近紫外光作为激发源时,相较于BAM:Eu2+,KNaCa2(P O4)2:Eu2+材料具有更强的发射强 度。此外,KNaCa2(PO4)2:Eu2+和BAM:Eu2+的CIE色坐标接近,均位于蓝 色区域,色坐标分别 为(0.154,0.154)和(0.141,0.112)。研究结果 表明,KN aCa2(PO4)2:Eu2+是一种在三基色白光LED中有应用前景的蓝色荧光粉。  相似文献   

10.
Using SIMS analysis, we have measured oxygen and carbon concentrations in epitaxial Si films grown between 550 and 900° C. The films were grown by rapid thermal chemical vapor deposition from SiH4 as well as several different SiH2Cl2 sources. We have found that at low deposition temperatures (∼750° C or lower), oxygen incorporation is first dictated by source gas impurities and then by residual chamber gases. For the case of SiH2Cl2, which can have substantial oxygen content due to its reactivity with H2O, oxygen concentrations of about 1020 cm-3 are typical at low deposition temperatures. SiH4, however, can be obtained in higher purity, and oxygen concentrations of 1018 cm-3 can be realized at low temperatures. At higher deposition temperatures (750-900° C), SiO volatilizes, leaving the films grown from all sources with low oxygen concentrations, typically less than 5 × 1017 cm-3. Carbon incorporation is much less of a problem since it is present to a lesser extent both in the chamber background and in the source gases. Carbon levels less than or equal to 1018 cm-3 can be obtained at all deposition temperatures greater than about 650° C. The performance ofp/n junctions is shown to degrade significantly for junctions grown below 850° C. We conclude that for growth of long lifetime Si films in the temperature range <800° C, that low residual H2O partial pressures (<10-10 Torr) are desired. Therefore, CVD chambers should be loadlocked and also capable of base pressures as low as about 10-9 Torr.  相似文献   

11.
Schottky barrier SOI-MOSFETs incorporating a La2O3/ZrO2 high-k dielectric stack deposited by atomic layer deposition are investigated. As the La precursor tris(N,N′-diisopropylformamidinato) lanthanum is used. As a mid-gap metal gate electrode TiN capped with W is applied. Processing parameters are optimized to issue a minimal overall thermal budget and an improved device performance. As a result, the overall thermal load was kept as low as 350, 400 or 500 °C. Excellent drive current properties, low interface trap densities of 1.9 × 1011 eV−1 cm−2, a low subthreshold slope of 70-80 mV/decade, and an ION/IOFF current ratio greater than 2 × 106 are obtained.  相似文献   

12.
We report on the photoluminescent (PL) properties of ZnO thin films grown on SiO2/Si(100) substrates using low pressure metal-organic chemical vapor deposition. The growth temperature of the films was as low as 400°C. From the PL spectra of the films at 10–300 K, strong PL peaks due to free and bound excitons were observed. The origin of the near bandedge emission peaks was investigated measuring temperature-dependent PL spectra. In addition, the Zn O films demonstrated a stimulated emission peak at room temperature. Upon illumination with an excitation density of 1 MW/cm2, a strong, sharp peak was observed at 3.181 eV.  相似文献   

13.
The first results were reported on low temperature epitaxial growth of Si0.5Ge0.5 alloy layer on Si (100) by ion beam assisted deposition. Nucleation and the growth of Si0.5Ge0.5 alloy layer had been investigated by atomic force microscopy and reflection high energy electron diffraction analysis. The Si0.5Ge0.5 alloy layer nucleated on Si (100) via Stranski-Krastanov (SK) mode. The Ar ion bombard-ment improved crystallinity and prolonged layer-by-layer stage of the SK mode. The epitaxial temperature was 200°C lower than 550-600°C in molecular beam epitaxy. In order to explain the mechanism of low temperature epitaxial growth EAr (energy transferred to growing film by bombarding Ar ion, eV/atom) value was experimentally calculated. In conclusion, the ion bombardment induced dissociation of three-dimensional islands and enhanced the surface diffusion. The variation of tetragonal strain and its effect on electron mobility were taken into consideration. Electron mobility increased with tetragonal strain as a result of band split.  相似文献   

14.
Yttrium was deposited on the chemical oxide of Si and annealed under vacuum to control the interface for the formation of Y2O3 as an insulating barrier to construct a metal-ferroelectric-insulator-semiconductor structure. Two different pre-annealing temperatures of 600 and 700 °C were chosen to investigate the effect of the interface state formed after the pre-annealing step on the successive formation of Y2O3 insulator and Nd2Ti2O7 (NTO) ferroelectric layer through annealing under an oxygen atmosphere at 800 °C. Pre-anneal treatments of Y-metal/chemical-SiO2/Si at 600 and 700 °C induced a formation of Y2O3 and Y-silicate, respectively. The difference in the pre-anneal temperature induced almost no change in the electrical properties of the Y2O3/interface/Si system, but degraded properties were observed in the NTO/Y2O3/interface/Si system pre-annealed at 600 °C when compared with the sample pre-annealed at 700 °C. C-V characteristics of the NTO/Y2O3/Si structured system showed a clockwise direction of hysteresis, and this gap could be used as a memory window for a ferroelectric-gate. A smaller hysteric gap and electrical breakdown values were observed in the NTO/Y2O3/Si system pre-annealed at 600 °C, and this was due to an unintentional distribution of the applied field from the presence of an interfacial layer containing Y-silicate and SiO2 phases.  相似文献   

15.
田少华 《光电子.激光》2015,26(10):1942-1946
采用固相法于550℃灼烧4h,合成了Eu3+ 单掺杂的NaY(MoO4)2材料,研究了材料的 发光特性。X射线衍射(XRD)结果显示,掺杂少量杂质的材料仍为纯相的NaY(MoO4)2。以 393nm波长 近紫外光作为激发源时,NaY(MoO4)2:Eu3+可以发射主峰位于616nm波长的红色光,对应Eu3+5D0-7F2跃迁发射。研究发现,增大Eu3+掺杂量 时,对应材料的发射强度会逐渐增大,但是 未发现浓度猝灭现象,通过相应的衰减曲线解释了此结果。测量不同Eu3+掺杂量下 , NaY(MoO4)2:Eu3+的色坐标结果显示,色坐标基本不变,位于红色区域。上述 结果表明, NaY(MoO4)2:Eu3+在白光LEDs领域有一定的应用潜力。  相似文献   

16.
掺氮氧化铪是半导体工业非常重要的材料。在本论文中,我们利用Hf[N(C2H5)(CH3)]4 和 H2O2作为原子层淀积的前驱体,制备了二氧化铪材料。然后,我们使用快速热退火的办法,在不同温度下,对二氧化铪进行了氮掺杂工艺。我们对掺氮二氧化铪的组分,跟硅界面的稳定性以及薄膜材料的光学特性随退火温度的变化进行了细致的研究。研究发现,随着退火温度的提高,二氧化铪薄膜材料的氮组分从1.41% 上升至 7.45%,相应的,薄膜材料的禁带宽度从5.82 eV 降低为 4.94 eV。  相似文献   

17.
Recent work indicates that the alloy (Si2)x(GaAs)1−x can be formed within the GaAs quantum well of an AlxGa1−xAs-GaAs quantum well heterostructure (QWH) and results in a shift of laser operation to higher energy. In this paper we show, by SIMS and EDS measurements, that the Si concentration in the (Si2)x(GaAs)1−x layer far exceeds typical “doping” levels. The stability of these QWHs has been investigated with respect to thermal annealing and Zn impurity-induced layer disordering (Zn-IILD). Data are presented showing that the (Si2)x(GaAs)1−x alloy is stable against thermal annealing unless a rich source of Ga vacancies is provided, and that relatively low temperature Zn diffusion greatly enhances the disordering process of the alloy layer.  相似文献   

18.
The sulfur chemical bonding state on (NH4)2Sx-treated InP(100) surfaces has been studied by S 1s core-level photoelectron measurements using synchrotron radiation soft x-rays. The change in the sulfur chemical bonding states caused by rinsing with water and annealing in vacuum after the (NH4)2Sx-treatment was observed clearly in the S 1s spectra. Four kinds of sulfur bonding states were resolved in the S 1s spectrum of the as-treated surface. Only one sulfur bonding state was detected on the surfaces with and without the water rinse after annealing, indicating that the InP surfaces were terminated by the S-In bond. The effect of rinsing the (NHj4)2Sx-treated InP surface is discussed by comparison with the (NH4)2Sx-treated GaAs surface.  相似文献   

19.
Reliability of polyoxide grown by electron cyclotron resonance (ECR) N2O-plasma on heavily phosphorus-doped polysilicon has been investigated for the interpoly dielectrics (IPDs) of nonvolatile memories (NVMs). ECR N2O-plasma polyoxide grown on polysilicon with phosphorus of 1 × 1021 cm−3 exhibits a significantly high breakdown field of 10 MV/cm and low electron trapping rate of 0.5 V, which are regardless of phosphorus concentration. The improvements are attributed to the smooth polyoxide/polysilicon interface, low phosphorus concentration, and nitrogen-rich layer with strong silicon-nitrogen bonds at the polyoxide/polysilicon interface.  相似文献   

20.
A new MBE growth method for the fabrication of a high-quality double hetero-epitaxial Si/γ-Al2O3/Si structure was recently developed. In the present work, characteristics of NMOSFETs fabricated on the Si/γ-Al2O3/Si structure were investigated, and compared with those on a Si/MgAl2O4/Si structure. A γ-Al2O3 layer was created from a MgAl2O4 layer by reaction with Si beams as follows: MgAl2O4 + Si → γ-Al2O3 + SiO ↑ + Mg ↑. The MBE growth of Si on the effectively restructured γ-Al2O3 layer was then performed at a substrate temperature of 700° C, 150° C lower than for the MBE growth of Si on a MgAl2O4/Si substrate. The electron field effect mobility and leakage current between source and drain for the NMOSFETs fabricated on Si/γ-Al2O3/Si structures were 660 cm2/V · s and 2.8 pA/μm respectively, and exhibited a higher level of performance than those on a Si/MgAl2O4/Si structure. In the Si/MgAl2O4/Si, SIMS measurements confirmed that autodoped Al and Mg atoms near the interface between the Si epi-layer and MgAl2O4/Si substrate diffused anomalously and accumulated at the surface during device fabrication processes. These autodoped Al and Mg atoms acted as ionized impurities during test operation. Suppression of autodoping from insulator layers during the MBE growth of Si was thus deemed essential to the improvement of NMOSFET characteristics. In the Si/γ-Al2O3/Si structure, autodoped atoms were scarcely detectable. It was therefore concluded that the Si/γ-Al2O3/Si structure under study was very promising for SOI device applications.  相似文献   

设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号