The effect of interface states, excess capacitance and series resistance in the Al/SiO2/p-Si Schottky diodes

The current-voltage (I-V) characteristics of Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance-voltage (C-V) and conductance-voltage (G-V) measurements are studied at frequency range of 10 kHz-1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO₂ interface. The density of interface states (N_ss) distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) at room temperature for the Schottky diode on the order of ≅4 × 10¹³ eV⁻¹ cm⁻²_. These high values of N_ss were responsible for the non-ideal behaviour of I-V and C-V characteristics. Frequency dispersion in C-V and G-V can be interpreted only in terms of interface states. The N_ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I-V, C-V and G-V characteristics of SD are affected not only in N_ss but also in series resistance (R_s), and the location of N_ss and R_s has a significant on electrical characteristics of Schottky diodes.     

Effect of surface preparation on the properties of Au/p-Cd1−xZnxTe

The effect of bromine methanol (BM) etching and NH₄F/H₂O₂ passivation on the Schottky barrier height between Au contact and semi-insulated (SI) p-Cd_1−xZn_xTe (x ≈ 0.09-0.18) was studied through current-voltage (I-V) and capacitance-voltage (C-V) measurements. Near-infrared (NIR) spectroscopy technique was utilized to determine the Zn concentration. X-ray photoelectron spectroscopy (XPS) for surface composition analysis showed that BM etched sample surface left a Te⁰-rich layer, however, which was oxidized to TeO₂ and the surface [Te]/([Cd] + [Zn]) ratio restored near-stoichiometry after NH₄F/H₂O₂ passivation. According to I-V measurement, barrier height was 0.80 ± 0.02-0.85 ± 0.02 eV for Au/p-Cd_1−xZn_xTe with BM etching, however, it increased to 0.89 ± 0.02-0.93 ± 0.02 eV with NH₄F/H₂O₂ passivation. Correspondingly, it was about 1.34 ± 0.02-1.43 ± 0.02 eV and 1.41 ± 0.02-1.51 ± 0.02 eV by C-V method.     

Characterization of Y2O3 gate dielectric on n-GaAs substrates

Physical and electrical properties of sputtered deposited Y₂O₃ films on NH₄OH treated n-GaAs substrate are investigated. The as-deposited films and interfacial layer formation have been analyzed by using X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS). It is found that directly deposited Y₂O₃ on n-GaAs exhibits excellent electrical properties with low frequency dispersion (<5%), hysteresis voltage (0.24 V), and interface trap density (3 × 10¹² eV⁻¹ cm⁻²). The results show that the deposition of Y₂O₃ on n-GaAs can be an effective way to improve the interface quality by the suppression on native oxides formation, especially arsenic oxide which causes Fermi level pinning at high-k/GaAs interface. The Al/Y₂O₃/n-GaAs stack with an equivalent oxide thickness (EOT) of 2.1 nm shows a leakage current density of 3.6 × 10⁻⁶ A cm⁻² at a V_FB of 1 V. While the low-field leakage current conduction mechanism has been found to be dominated by the Schottky emission, Poole-Frenkel emission takes over at high electric fields. The energy band alignment of Y₂O₃ films on n-GaAs substrate is extracted from detailed XPS measurements. The valence and conduction band offsets at Y₂O₃/n-GaAs interfaces are found to be 2.14 and 2.21 eV, respectively.     

Improved electrical and interfacial properties of RF-sputtered HfAlOx on n-GaAs with effective Si passivation

In this paper, we present the effects of ultrathin Si interfacial layer on the physical and electrical properties of GaAs MOS capacitors fabricated using RF-sputtered HfAlO_x gate dielectric. It is found that HfAlO_x/Si/n-GaAs stack exhibits excellent electrical properties with low frequency dispersion (∼4.8%), hysteresis voltage (0.27 V) and interface trap density (1.3 × 10¹² eV⁻¹ cm⁻²). The current density of 3.7 × 10⁻⁵ A/cm² is achieved with an equivalent-oxide-thickness of 1.8 nm at V_FB + 1 V for Si-passivated HfAlO_x films on n-GaAs. X-ray photoelectron spectroscopy (XPS) analysis shows that the suppression of low-k interfacial layer formation is accomplished with the introduction of ultrathin Si interface control layer (ICL). Thus the introduction of thin layer of Si between HfAlO_x dielectrics and GaAs substrate is an effective way to improve the interface quality such as low frequency dispersion, hysteresis voltage and leakage current. Additionally, current conduction mechanism has been studied and the dominant conduction mechanisms are found to be Schottky emission at low to medium electric fields and Poole-Frenkel at high fields and high temperatures under substrate injection. In case of gate injection, the main current conduction at low field is found to be the Schottky emission at high temperatures.     

Current conduction mechanism in Al/p-Si Schottky barrier diodes with native insulator layer at low temperatures

The forward bias current-voltage (I-V) characteristics of Al/p-Si (MS) Schottky diodes with native insulator layer were measured in the temperature range of 80-300 K. The obtained zero bias barrier height Φ_B0(I-V), ideality factor (n) and series resistance (R_s) determined by using thermionic emission (TE) mechanism show strong temperature dependence. There is a linear correlation between the Φ_B0(I-V) and n because of the inhomogeneties in the barrier heights (BHs). Calculated values from temperature dependent I-V data reveal an unusual behaviour such that the Φ_B0 decreases, as the n and R_s values are increasing with decreasing absolute temperature, and these changes are more pronounced especially at low temperatures. Such temperature dependence of BH is contradictory with the reported negative temperature coefficient of the barrier height. In order to explain this behaviour we have reported a modification in the expression reverse saturation current I_o including the n and the tunnelling factor (αΧ^1/2δ) estimated to be 15.5. Therefore, corrected effective barrier height Φ_bef.(I-V) versus temperature has a negative temperature coefficients (α = −2.66 × 10⁻⁴ eV/K) and it is in good agreement with negative temperature coefficients (α = −4.73 × 10⁻⁴ eV/K) of Si band gap. In addition, the temperature dependent energy distribution of interface states density N_ss profiles was obtained from the forward bias I-V measurements by taking into account the bias dependence of the Φ_e and n. The forward bias I-V characteristics confirm that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that the current conduction mechanism of MS Schottky diodes.     

A study of interface characteristics in HfAlO/p-Si by deep level transient spectroscopy

Deep level transient spectroscopy (DLTS) and high-frequency capacitance-voltage (HF-CV) measurement are used for the investigation of HfAlO/p-Si interface. The so-called “slow” interface states detected by HF-CV are obtained to be 2.68 × 10¹¹ cm⁻². Combined conventional DLTS with insufficient-filling DLTS (IF-DLTS), the true energy level position of interfacial traps is found to be 0.33 eV above the valance band maximum of silicon, and the density of such “fast” interfacial traps is 1.91 × 10¹² cm⁻² eV⁻¹. The variation of energy level position of such traps with different annealing temperatures indicates the origin of these traps may be the oxide-related traps very close to the HfAlO/Si interface. The interfacial traps’ passivation and depassivation effect of postannealing in forming gas are shown by comparing samples annealed at different temperatures.     

Interface properties of an O2 annealed Au/Ni/n-Al0.18Ga0.82N Schottky contact

We oxidized a Ni/Au metal bi-layer contact fabricated on HVPE Al_0.18Ga_0.82N from 373 K to 573 K in 100 K steps. In the range 1 kHz to 2 MHz, the Capacitance–Voltage–Frequency (C–V–f) measurements reveal a frequency dispersion of the capacitance and the presence of an anomalous peak at 0.4 V owing to the presence of interface states in the as deposited contact system. The dispersion was progressively removed by O₂ anneals from temperatures as low as 373 K. These changes are accompanied by an improvement in the overall quality of the Schottky system: the ideality factor, n, improves from 2.09 to 1.26; the Schottky barrier height (SBH), determined by the Norde [1] method, increases from 0.72 eV to 1.54 eV. From the Nicollian and Goetzberger model [2], we calculated the energy distribution of the density of interface states, N_SS. Around 1 eV above the Al_0.18Ga_0.82N valence band, N_SS, decreases from 2.3×10¹² eV⁻¹ cm⁻² for the un-annealed diodes to 1.3×10¹² eV⁻¹ cm⁻² after the 573 K anneal. Our results suggest the formation of an insulating NiO leading to a MIS structure for the oxidized Au/Ni/Al_0.18Ga_0.82N contact.     

The conductance and capacitance-frequency characteristics of Au/pyronine-B/p-type Si/Al contacts

The rectifying junction characteristics of the organic compound pyronine-B (PYR-B) film on a p-type Si substrate have been studied. The PYR-B has been evaporated onto the top of p-Si surface. The barrier height and ideality factor values of 0.67 ± 0.02 eV and 2.02 ± 0.03 for this structure have been obtained from the forward bias current-voltage (I-V) characteristics. The energy distribution of the interface states and their relaxation time have been determined from the forward bias capacitance-frequency and conductance-frequency characteristics in the energy range of ((0.42 ± 0.02) − E_v)-((0.66 ± 0.02) − E_v) eV. The interface state density values ranges from (4.21 ± 0.14) × 10¹³ to (3.82 ± 0.24) × 10¹³ cm⁻² eV⁻¹. Furthermore, the relaxation time ranges from (1.65 ± 0.23) × 10⁻⁵ to (8.12 ± 0.21) × 10⁻⁴ s and shows an exponential rise with bias from the top of the valance band towards the midgap.     

The barrier height inhomogeneity in Al/p-Si Schottky barrier diodes with native insulator layer

The current-voltage (I-V) characteristics of Al/p-Si Schottky barrier diodes (SBDs) with native insulator layer were measured in the temperature range of 150-375 K. The estimated zero-bias barrier height Φ_B0 and the ideality factor n assuming thermionic emission (TE) theory show strong temperature dependence. Evaluation of the forward I-V data reveals an increase of zero-bias barrier height Φ_B0 but decrease of ideality factor n with increase in temperature. The conventional Richardson plot exhibits non-linearity below 250 K with the linear portion corresponding to activation energy of 0.41 eV and Richardson constant (A^*) value of 1.3 × 10⁻⁴ A cm⁻² K⁻² is determined from intercept at the ordinate of this experimental plot, which is much lower than the known value of 32 A cm² K² for holes in p-type Si. Such behavior is attributed to Schottky barrier inhomogene ties by assuming a Gaussian distribution of barrier heights (BHs) due to barrier height inhomogeneities that prevail at interface. Also, Φ_B0 versus q/2kT plot was drawn to obtain evidence of a Gaussian distribution of the BHs, and values of Φ_B0 = 1.055 eV and σ₀ = 0.13 V for the mean BH and zero-bias standard deviation have been obtained from this plot, respectively. Thus, the modified versus q/kT plot gives Φ_B0 and A^* as 1.050 eV and 40.08 A cm⁻² K⁻², respectively, without using the temperature coefficient of the barrier height. This value of the Richardson constant 40.03 A cm⁻² K⁻² is very close to the theoretical value of 32 A K⁻² cm⁻² for p-type Si. Hence, it has been concluded that the temperature dependence of the forward I-V characteristics of the Al/p-Si Schottky barrier diodes with native insulator layer can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights.     

Interface characterization and current conduction in HfO2-gated MOS capacitors

Metal-oxide-semiconductor (MOS) capacitors incorporating hafnium dioxide (HfO₂) dielectrics were fabricated and investigated. In this work, the electrical and interfacial properties were characterized based on capacitance-voltage (C-V) and current-voltage (I-V) measurements. Thereafter the current conduction mechanism, electron effective mass (m*), mean density of interface traps per unit area and energy (), energy distribution of interface traps density and near-interface oxide traps density (N_NIOT) were studied in details. The characterization reveals that the dominant conduction mechanism in the region of high temperature and high field is Schottky emission. The mean density of interface traps per unit area and energy is about 6.3 × 10¹² cm⁻² eV⁻¹ by using high-low frequency capacitance method. The maximum D_it is about 7.76 × 10¹² cm⁻² eV⁻¹ located at 0.27 eV above the valence band.     

High-k Al2O3 MOS structures with Si interface control layer formed on air-exposed GaAs and InGaAs wafers

This paper attempts to realize unpinned high-k insulator-semiconductor interfaces on air-exposed GaAs and In_0.53Ga_0.47As by using the Si interface control layer (Si ICL). Al₂O₃ was deposited by ex situ atomic layer deposition (ALD) as the high-k insulator. By applying an optimal chemical treatment using HF acid combined with subsequent thermal cleaning below 500 °C in UHV, interface bonding configurations similar to those by in situ UHV process were achieved both for GaAs and InGaAs after MBE growth of the Si ICL with no trace of residual native oxide components. As compared with the MIS structures without Si ICL, insertion of Si ICL improved the electrical interface quality, a great deal both for GaAs and InGaAs, reducing frequency dispersion of capacitance, hysteresis effects and interface state density (D_it). A minimum value of D_it of 2 × 10¹¹ eV⁻¹ cm⁻² was achieved both for GaAs and InGaAs. However, the range of bias-induced surface potential excursion within the band gap was different, making formation of electron layer by surface inversion possible in InGaAs, but not possible in GaAs. The difference was explained by the disorder induced gap state (DIGS) model.     

Temperature-dependent optical absorption measurements and Schottky contact behavior in layered semiconductor n-type InSe(:Sn)

The layered n-InSe(:Sn) single crystal samples have been cleaved from a large crystal ingot grown from non-stoichiometric melt by the Bridgman-Stockbarger method. It has been made the absorption measurements of these samples without Schottky contact under electric fields of 0.0 and 6000 V cm⁻¹. The band gap energy value of the InSe:Sn has been calculated as 1.36 ± 0.01 eV (at 10 K) and 1.28 ± 0.01 eV (at 300 K) under zero electrical field, and 1.31 ± 0.01 eV (at 10 K) and 1.26 ± 0.01 eV (at 300 K) under 6000 Vcm⁻¹. The current-voltage (I-V) characteristics of Au-Ge/InSe(:Sn)/In Schottky diodes have been measured in the temperature range 80-320 K with a temperature step of 20 K. An experimental barrier height (BH) Φ_ap value of about 0.70 ± 0.01 eV was obtained for the Au-Ge/InSe(:Sn)/In Schottky diode at the room temperature (300 K). An abnormal decrease in the experimental BH Φ_b and an increase in the ideality factor n with a decrease in temperature have been explained by the barrier inhomogeneities at the metal-semiconductor interface. From the temperature-dependent I-V characteristics of the Au-Ge/InSe(:Sn)/In contact, that is, and A^* as 0.94 ± 0.02 and 0.58 ± 0.02 eV, and 27 ± 2 and 21 ± 1 (A/cm² K²), respectively, have been calculated from a modified versus 1/T plot for the two temperature regions. The Richardson constant values are about two times larger than the known value of 14.4 (A/cm² K²) known for n-type InSe. Moreover, in the temperature range 80-320 K, we have also discussed whether or not the current through the junction has been connected with TFE.     

Illumination dependence of I-V and C-V characterization of Au/InSb/InP(1 0 0) Schottky structure

The effects of surface preparation and illumination on electric parameters of Au/InSb/InP(100) Schottky diode were investigated, in the later diode InSb forms a fine restructuration layer allowing to block In atoms migration to surface. In order to study the electric characteristics under illumination, we make use of an He-Ne laser of 1 mW power and 632.8 nm wavelength. The current-voltage I(V_G), the capacitance-voltage C(V_G) measurements were plotted and analysed. The saturation current I_s, the serial resistance R_s and the mean ideality factor n are, respectively, equal to 2.03 × 10⁻⁵ A, 85 Ω, 1.7 under dark and to 3.97 × 10⁻⁵ A, 67 Ω, 1.59 under illumination. The analysis of I(V_G) and C(V_G) characteristics allows us to determine the mean interfacial state density N_ss and the transmission coefficient θ_n equal, respectively, to 4.33 × 10¹² eV⁻¹ cm⁻², 4.08 × 10⁻³ under dark and 3.79 × 10¹² eV⁻¹ cm⁻² and 5.65 × 10⁻³ under illumination. The deep discrete donor levels presence in the semiconductor bulk under dark and under illumination are responsible for the non-linearity of the C⁻²(V_G) characteristic.     

Interfacial differences in enhanced schottky barrier height Au/n-GaAs diodes deposited at 77 K

The use of cryogenic temperatures (∼77 K) during Au Schottky contact deposition onto n-GaAs produces an increase in barrier height from 0.73 eV for room temperature diodes to 0.82 eV. Not all Schottky metals show this enhancement—for example Pt and Ti do not show any significant change in barrier height whereas Au, Pd and Ni show increases between 7 and 18%. We used X-ray reflectivity to show that the main difference between Au deposited at 77 K and room temperature is a decreased metal roughness while the interfacial roughness between the Au and GaAs is basically the same. As the diodes are annealed to 300 °C both the difference in barrier height and interfacial roughness is lost. This is a simple method with potential for improving the performance of GaAs metal-semiconductor-field-effect-transistors (MESFETs).     

Electronic properties of the metal/organic interlayer/inorganic semiconductor sandwich device

In this study, we prepared a Metal(Al)/Organic Interlayer(Congo Red=CR)/Inorganic Semiconductor (p-Si) (MIS) Schottky device formed by coating of an organic film on p-Si semiconductor wafer. The Al/CR/p-Si MIS device had a good rectifying behavior. By using the forward bias I-V characteristics, the values of ideality factor (n) and barrier height (Φ_b) for the Al/CR/p-Si MIS device were obtained as 1.68 and 0.77 eV, respectively. It was seen that the Φ_b value of 0.77 eV calculated for the Al/CR/p-Si MIS device was significantly higher than value of 0.50 eV of the conventional Al/p-Si Schottky diodes. Modification of the interfacial potential barrier of the Al/p-Si diode was achieved by using a thin interlayer of the CR organic material. This was attributed to the fact that the CR organic interlayer increased the effective barrier height by influencing the space charge region of Si. The interface-state density of the MIS diode was found to vary from 1.24×10¹³ to 2.44×10¹² eV⁻¹ cm⁻².     

Effect of plasma treatment on interface property of BCN/GaN structure

Interface properties of BCN/GaN metal-insulator-semiconductor (MIS) structures are investigated by X-ray photoelectron spectroscopy (XPS) and capacitance versus voltage (C-V) characteristics measurements. The BCN/GaN samples are fabricated by in situ process consisting of plasma treatment and deposition of BCN film in the plasma-assisted chemical vapor deposition (PACVD) apparatus. XPS measurement shows that the oxide formation at the BCN/GaN interface is suppressed by nitrogen (N₂) and hydrogen (H₂) plasma treatment. The interface state density is estimated from C-V characteristics measured at 1 MHz using Terman method. The minimum interface state density appears from 0.2 to 0.7 eV below the conduction band edge of GaN. The minimum value of the interface state density is estimated to be 3.0 × 10¹⁰ eV⁻¹ cm⁻² for the BCN/GaN structure with mixed N₂ and H₂ plasma treatment for 25 min. Even after annealing at 430 °C for 10 min, the interface state density as low as 6.0 × 10¹⁰ eV⁻¹ cm⁻² is maintained.     

Current transport mechanism in Al/Si3N4/p-Si (MIS) Schottky barrier diodes at low temperatures

The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of metal-insulator-semiconductor (Al/Si₃N₄/p-Si) Schottky barrier diodes (SBDs) were measured in the temperature range of 80-300 K. By using the thermionic emission (TE) theory, the zero-bias barrier height Φ_B0 calculated from I-V characteristics was found to increase with increasing temperature. Such temperature dependence is an obvious disagreement with the negative temperature coefficient of the barrier height calculated from C-V characteristics. Also, the ideality factor decreases with increasing temperature, and especially the activation energy plot is nonlinear at low temperatures. Such behaviour is attributed to Schottky barrier inhomogeneties by assuming a Gaussian distribution of barrier heights (BHs) at interface. We attempted to draw a Φ_B0 versus q/2kT plot to obtain evidence of a Gaussian distribution of the BHs, and the values of Φ_Bo = 0.826 eV and α_o = 0.091 V for the mean barrier height and standard deviation at zero-bias, respectively, have been obtained from this plot. Thus, a modified ln(I_o/T²) − q²σ_o²/2(kT)² versus q/kT plot gives Φ_B0 and Richardson constant A^* as 0.820 eV and 30.273 A/cm² K², respectively, without using the temperature coefficient of the barrier height. This value of the Richardson constant 30.273 A/cm² K² is very close to the theoretical value of 32 A/cm² K² for p-type Si. Hence, it has been concluded that the temperature dependence of the forward I-V characteristics of the Al/Si₃N₄/p-Si Schottky barrier diodes can be successfully explained on the basis of TE mechanism with a Gaussian distribution of the barrier heights. In addition, the temperature dependence of energy distribution of interface state density (N_SS) profiles was determined from the forward I-V measurements by taking into account the bias dependence of the effective barrier height and ideality factor.     

Determination of the laterally homogeneous barrier height of thermally annealed and unannealed Au/p-InP/Zn-Au Schottky barrier diodes

We have identically prepared Au/p-InP Schottky barrier diodes (SBDs). The diodes were annealed up to 400 °C thermally. The barrier height (BH) for the as-deposited Au/p-InP/Zn-Au SBDs from the current-voltage characteristics have varied from 0.58 to 0.72 eV, and ideality factor n from 1.14 to 1.47. The BH for the annealed SBDs from the current-voltage characteristics have varied from 0.76 to 0.82 eV, and ideality factor n from 1.17 to 1.39. As a result of the thermal annealing, it has been seen that the BH values of the annealed SBDs are larger than those of the as-deposited SBDs. We have determined a lateral homogeneous BH value of 0.72 eV for the as-deposited Au/p-InP SBD from the experimental linear relationship between barrier heights and ideality factors, and a value of 0.85 eV for the annealed Au/p-InP SBD. The increase of 0.13 eV in the BH value by means of 400 °C annealing has been ascribed to the formation of the excess charges that electrically actives on the semiconductor surface.     

The effects of annealing on Au/pyronine-B/MD n-InP Schottky structure

Thin film of non-polymeric organic compound pyronine-B has been fabricated on moderately doped (MD) n-InP substrate as an interfacial layer using spin coating technique for the electronic modification of Au/MD n-InP Schottky contact. The electrical characteristics have been determined at room temperature. The barrier height and the ideality factor values for Au/pyronine-B/MD n-InP Schottky diode have been obtained from the forward bias I-V characteristics at room temperature as 0.60 eV and 1.041; 0.571 and 1.253 eV after annealing at 100 and 250 °C, respectively. An increase in annealing temperature at the Au/n-InP Schottky junction is shown to increase the reverse bias leakage current by about one order of magnitude and decrease the Schottky barrier height by 0.027 eV. Furthermore, the barrier height values for the Au/pyronine-B/MD n-InP Schottky diode have also been obtained from the C-V characteristics at room temperature as 1.001 and 0.709 eV after annealing at 100 and 250 °C, respectively. Finally, it was seen that the diode parameters changed with increase in the annealing temperature.     

Investigation of diode parameters using I-V and C-V characteristics of In/SiO2/p-Si (MIS) Schottky diodes

A study on interface states density distribution and characteristic parameters of the In/SiO₂/p-Si (MIS) capacitor has been made. The thickness of the SiO₂ film obtained from the measurement of the corrected capacitance in the strong accumulation region for MIS Schottky diodes was 220 Å. The diode parameters from the forward bias I-V characteristics such as ideality factor, series resistance and barrier heights were found to be 1.75, 106-112 Ω and 0.592 eV, respectively. The energy distribution of the interface state density D_it was determined from the forward bias I-V characteristics by taking into account the bias dependence of the effective barrier height. The interface state density obtained using the I-V characteristics had an exponential growth, with bias towards the top of the valance band, from 9.44×10¹³ eV⁻¹ cm⁻² in 0.329-E_v eV to 1.11×10¹³ eV⁻¹ cm⁻² in 0.527-E_v eV at room temperature. Furthermore, the values of interface state density D_it obtained by the Hill-Coleman method from the C-V characteristics range from 52.9×10¹³ to 1.11×10¹³ eV⁻¹ cm⁻² at a frequency range of 30kHz-1 MHz. These values of D_it and R_s were responsible for the non-ideal behaviour of I-V and C-V characteristics.