Structural and electrical characteristics of lanthanum oxide gate dielectric film on GaAs pHEMT technology

This paper investigates the feasibility of using a lanthanum oxide thin film (La_2O_3) with a high dielectric constant as a gate dielectric on GaAs pHEMTs to reduce gate leakage current and improve the gate to drain breakdown voltage relative to the conventional GaAs pHEMT. An E/D mode pHEMT in a single chip was realized by selecting the appropriate La_2O_3 thickness. The thin La_2O_3 film was characterized: its chemical composition and crystalline structure were determined by X-ray photoelectron spectroscopy and X-ray diffraction, respectively.La_2O_3 exhibited good thermal stability after post-deposition annealing at 200, 400 and 600 ℃ because of its high binding-energy (835.6 eV). Experimental results clearly demonstrated that the La_2O_3 thin film was thermally stable.The DC and RF characteristics of Pt/La_2O_3/Ti/Au gate and conventional Pt/Ti/Au gate pHEMTs were examined.The measurements indicated that the transistor with the Pt/La_2O_3/Ti/Au gate had a higher breakdown voltage and lower gate leakage current. Accordingly, the La_2O_3 thin film is a potential high-k material for use as a gate dielectric to improve electrical performance and the thermal effect in high-power applications.     

Growth of lanthanum oxide films for application as a gate dielectric in CMOS technology

We have investigated properties of insulating lanthanum oxide (La₂O₃) films in connection with the replacement of silicon oxide (SiO₂) gate dielectrics in new generation of CMOS devices. The La₂O₃ layers were grown using metal organic chemical vapour deposition (MOCVD) at 500 °C. X-ray diffraction analysis revealed polycrystalline character of the films grown above 500 °C. The X-ray photoemission spectroscopy detected lanthanum carbonate as a principal impurity in the films and lanthanum silicate at the interface with silicon. Density of oxide charge, interface trap density, leakage currents and dielectric constant ( κ) were extracted from the C-V and I-V measurements. Electrical properties, in particular dielectric constant of the MOCVD grown La₂O₃ are discussed with regard to the film preparation conditions. The as grown film had κ11. Electrical measurements indicate possible presence of oxygen vacancies in oxide layer. The O₂-annealed La₂O₃ film had κ17.     

高介电性纳米复合氧化膜的研究

首次在溴的丙酮溶液中,以钽作阳极,多孔型氧化铝为阴极,通过直流电沉积方法制备Ta/Al2O3复合氧化膜。结果表明:阳极钽在阴极氧化铝的表面和多孔结构内部均有沉积,并以纳米结构与多孔氧化铝结合生成复合氧化膜。     

Temperature effect on gate leakage currents in gate dielectric films of GaAs MOSFET

The gate dielectrics of Ga₂O₃(As₂O₃) of the GaAs MOSFET were prepared by a low-cost and low-temperature liquid-phase chemically enhanced oxidation method. The temperature and oxide thickness dependence of gate dielectric films on GaAs MOSFET have been investigated. The leakage current and dielectric breakdown field were both studied. Both gate leakage current density and breakdown electrical field were found to depend on the oxide thickness and operating temperature. The increasing trend in gate leakage current and the decreasing trend in breakdown electrical field were observed upon reducing oxide thickness from 30 to 12 nm and increasing operating temperature from −50°C to 200°C.     

A detailed analysis and electrical modeling of gate oxide shorts in MOS transistors

The characteristics of devices with gate oxide short defects are investigated for both n-MOS and p-MOS transistors. Experimental results obtained from real and design induced gate oxide shorts are presented analyzing the defect-induced conduction mechanisms that determine the transistor behavior. It is shown that three variables (defect location, transistor type and gate polysilicon doping type) influence the characteristics of a defective device. Of interest is the prediction and observation of a particular gate oxide short type that can cause latchup. An electrical model is proposed and compared with experimental data. Such a model is developed to be used in electrical CAD environments without introducing a penalty in the simulation time.This work is supported by the Ministry of Education of Spain (CICYT TIC 046/95).     

Effects of vapor-annealed gate dielectric on the properties of zinc tin oxide transparent thin film transistors

We investigated the effects of vapor-annealed gate dielectrics on the mobility, threshold voltage, and other characteristics of bottom gate zinc tin oxide (ZTO) transparent thin film transistors (TTFTs). Here, Al₂O₃ films coated on dry oxidized Si wafers were annealed in a water vapor atmosphere before ZTO deposition and used as TTFT gate dielectrics. The vapor-annealed ZTO TTFTs exhibited 50% higher mobility than those that were not vapor annealed. This improvement in mobility is ascribed to the hydrogen passivation in the amorphous ZTO films     

Structural and electrical resistivity characteristics of vacuum arc ion deposited zirconium nitride thin films

Zirconium nitride (ZrN) thin films were grown on glass and aluminum substrates using a dual cathodic arc ion deposition technique. The effects of various negative bias voltages and flow ratios of N₂/Ar on the stoichiometric ratio of nitrogen to zirconium (N/Zr), deposition rate, structure, surface morphology and electrical resistivity of the ZrN layer were investigated. Rutherford backscattering spectroscopy measurements indicated a drop in the deposition rate and a slight increase in stoichiometric ratio (N/Zr) with the increase of bias voltage up to −400 V, although the latter still remained slightly less than unity (~0.92). Deposition rate of the film showed an increase with the argon addition. X-ray diffraction patterns depicted mostly polycrystalline nature of the films, with preferential orientation of (2 0 0) planes in the −100 V to −300 V bias voltage range. For 70–50% nitrogen and at a bias voltage of −400 V, the (1 1 1) orientation of ZrN film predominated. The films were smoother at a lower bias of −100 V, while the roughness increased slightly at a higher bias voltage possibly due to (increased) preferential re-sputtering of zirconium-rich clusters/islands. Changes in the resistivity of the films were correlated with stoichiometry, crystallographic orientation and crystalline quality.     

Structural and electrical properties of ultra-thin high-k ZrO2 film on nitride passivated Ge(100) prepared by PEALD

The study of ultrathin ZrO₂ films grown on surface passivated germanium substrates by plasma enhanced Atomic Layer Deposition (PEALD) has been carried out. Nitride passivation has been used to form an interfacial layer between ZrO₂/Ge. The ultra-thin ZrO₂ film deposited with thickness of ~5.75 nm and refractive index of ~2.05 as observed through ellipsometry. The Ge3d, Zr3d, N1s and O1s are XPS core level spectra's confirm the formation of GeON and ZrO₂ ultra-thin films. The AFM results show the roughness of deposited films as low as 0.3 nm. The effect of post metallization annealing (PMA) on electrical properties of Au/Cr/ZrO₂/GeON/Ge capacitors has been investigated. The improvement in k value (~38) and an EOT value (~0.5 nm) after PMA on Ge/GeON/ZrO₂ stack has been observed. The flat band voltage and hysteresis of post metallization annealed devices has been reduced as compared to that of without PMA GeON/ZrO₂ stack.     

Low temperature processed hafnium oxide: Structural and electrical properties

In this work hafnium oxide (HfO₂) was deposited by r.f. magnetron sputtering at room temperature and then annealed at 200 °C in forming gas (N₂+H₂) and oxygen atmospheres, respectively for 2, 5 and 10 h. After 2 h annealing in forming gas an improvement in the interface properties occurs with the associated flat band voltage changing from −2.23 to −1.28 V. This means a reduction in the oxide charge density from 1.33×10¹² to 7.62×10¹¹ cm⁻². After 5 h annealing only the dielectric constant improves due to densification of the film. Finally, after 10 h annealing we notice a degradation of the electrical film's properties, with the flat band voltage and fixed charge density being −2.96 V and 1.64×10¹² cm⁻², respectively. Besides that, the leakage current also increases due to crystallization. On the other hand, by depositing the films at 200 °C or annealing it in an oxidizing atmosphere no improvements are observed when comparing these data to the ones obtained by annealing the films in forming gas. Here the flat band voltage is more negative and the hysteresis on the C–V plot is larger than the one recorded on films annealed in forming gas, meaning a degradation of the interfacial properties.