多媒体教学方式应用的调查与思考

近年来,随着计算机技术的普及与推广,多媒体教学走进了课堂并得到了迅速的发展。多媒体教学的效果究竟如何？笔者对使用多媒体教学的学生进行了关于多媒体教学环境、方式、课件、效果等问题的问卷调查,并对调查结果进行了分析和研究。充分肯定了多媒体教学方式的优势,归纳出了多媒体教学方法的一些不足,提出了进一步的改进措施。     

大学英语传统教学与多媒体教学方法的比较研究

现在是一个计算机普及的年代，许多的地方都会用到计算机也就是电脑，在一些学校的课堂上更是应用了多媒体进行教学，使用多媒体进行教学有着非常多的优点，其教课的过程中非常的灵活，教师可以通过多媒体与学生进行互动，由于多媒体有一块比较大的屏幕所以学生在学习的时候可以有非常好的视觉效果，可以看到真实的东西比起凭空想象来说就好多了，学生也更容易接受。尤其是在大学英语的教学当中，使用多媒体进行教学可以给英语课堂带来更多的乐趣，能够让学生对学习英语更有兴趣，使用多媒体进行教学是这么多年来教育界的一个比较重要的改革，也把教学的效率提升到了一个以往不敢想象的高度。但是，什么事情都是双方面的，计算机这一事物毕竟是一个新生的科研成果，里面包含着非常高深的高科技技术，有一部分没有接触过计算机的教师不能够很好的使用它，同时传统的教学观念对这些教师也有着一定的影响，所以，采用多媒体进行教学也存在着一些负面影响。     

用科学发展观指导多媒体教学

多媒体是现代科学技术发展的产物。多媒体的出现,使教学更加形象直观,使复杂抽象的问题变得容易理解。而传统的教学方法人类教学工作的经验和规律。因此将二者的更好地结合起来,也必须用科学发展观总结和指导教学的方法和手段。结合自己在教学中的体会,现就以下几个方面做以讨论。     

基于计算机技术的多媒体教学研究

一、多媒体教学的概念 目前的多媒体教学,主要是将计算机,多媒体技术、以及网络技术和现代教学方法相互结合应用于各方面教学的技术手段。采用计算机技术快速高效地向广大学生提供丰富多彩的文本、图形、频图像、动画等信息,而且界面非常友好生动,目前在各阶段各类高校中得到广泛应用,受到老师和学生的广泛好评。     

"数字信号处理"多媒体教学方法初探

在分析“数字信号处理”课程特点的基础上,提出了实施多媒体辅助教学的思路和原则。根据授课内容的不同,设计了多媒体教学手段的嵌入方式,并构建了相应的多媒体资源库。在教学实践过程中．重点考虑了板书和多媒体、幻灯片和音、视频的配合。最后,通过问卷调查方式对教学效果进行了评价。     

校园网与多媒体教学网络的方案与功能

目前有许多学校希望建设自己的校园网,建立全校范围的信息管理系统,实现校内的数据资源共享,以及和Internet互连,并接入中国教育科研网Cernet。本文将向大家介绍上海市闸北区业余大学建立校园网及基于校园网的多媒体教学网络的范例,希望能和兄弟学校做一些交流。构成校园网的方案1网络需求分析校园网作为学校管理、教育、科研和后勤服务等信息存储、传输及处理的基础平台,应能综合办公自动化系统、教育管理信息系统、多媒体教学系统、远程教育系统、实验室管理系统和图书馆管理系统等各种应用系统,使领导、教师、学生乃至家长都能够…     

高考改革背景下高中化学结合多媒体教学方法的探究

高中化学是打好化学基础的关键时期,同时由于高考改革的原因,不仅仅注重学生对知识的运用,还要培养学生的学科素养与情感态度,化学教师在日常教学中要更加注重学生的基础知识,帮助学生形成完整的知识体系.所以化学教师可以充分利用多媒体工具的优点设计教学,化抽象为具体,提高学生对知识的理解,进而提升教学质量.     

多媒体教学系统终端显示器的选择与运用

本文主要针对的是多媒体教学中各种类型的显示器性能和特点进行的分析,在使用过程中会遇到哪些问题。一般根据教学的场所要合理的选择适当的显示器,这样也会对多媒体教学的硬件设施具有重要的意义。     

高校教师多媒体教学素养研究

结合地方普通高校各学科多媒体教学实践,分析了高校教师多媒体教学素养现状,探讨了提高教师多媒体教学素养的途径和方法     

多媒体计算机辅助教学（MCAI）在幼儿教学中的应用

信息和网络技术的发展推动了现代教育技术的进步,作为一种新的技术,多媒体在现代教育领域的作用越来越明显,在幼儿教育中应用多媒体技术也成为一种新的趋势。文章主要讲述多媒体技术在幼儿教育教学中的应用,并结合相关实例进行阐述。     

PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing

PLX is a concise instruction set architecture (ISA) that combines the most useful features from previous generations of multimedia instruction sets with newer ISA features for high-performance, low-cost multimedia information processing. Unlike previous multimedia instruction sets, PLX is not added onto a base processor ISA, but designed from the beginning as a standalone processor architecture optimized for media processing. Its design goals are high performance multimedia processing, general-purpose programmability to support an ever-growing range of applications, simplicity for constrained environments where low power and low cost are paramount, and scalability for higher performance in less constrained multimedia systems. Another design goal of PLX is to facilitate exploration and evaluation of novel techniques in instruction set architecture, microarchitecture, arithmetic, VLSI implementations, compiler optimizations, and parallel algorithm design for new computing paradigms.Key characteristics of PLX are a fully subword-parallel architecture with novel features like wordsize scalability from 32-bit to 128-bit words, a new definition of predication, and an innovative set of subword permutation instructions. We demonstrate the use and high performance of PLX on some frequently-used code kernels selected from image, video, and graphics processing applications: discrete cosine transform, pixel padding, clip test, and median filter. Our results show that a 64-bit PLX processor achieves significant speedups over a basic 64-bit RISC processor and over IA-32 processors with MMX and SSE multimedia extensions. Using PLXs wordsize scalability feature, PLX-128 often provides an additional 2× speedup over PLX-64 in a cost-effective way. Superscalar or VLIW (Very Long Instruction Word) PLX implementations can also add additional performance through inter-instruction, rather than intra-instruction parallelism. We also describe the PLX testbed and its software tools for architecture and related research.Ruby B. Lee is the Forrest G. Hamrick Professor of Engineering and Professor of Electrical Engineering at Princeton University, with an affiliated appointment in the Computer Science department. She is the founder and director of the Princeton Architecture Laboratory for Multimedia and Security (PALMS). Her current research is in rethinking computer architecture for high-performance but low-cost security and multimedia processing. Prior to joining the Princeton faculty in 1998, Dr. Lee served as chief architect at Hewlett-Packard, responsible at different times for processor architecture, multimedia architecture, and security architecture for e-commerce and extended enterprises. She was a key architect in the initial definition and the evolution of the PA-RISC processor architecture used in HP servers and workstations. As chief architect for HPs multimedia architecture team, Dr. Lee led an inter-disciplinary team focused on architecture to facilitate pervasive multimedia information processing using general-purpose computers. She introduced innovative multimedia instruction set architecture (MAX and MAX-2) in microprocessors, resulting in the industrys first real-time, high-fidelity MPEG video and audio player implemented in software on low-end desktop computers. Dr. Lee also co-led an HP-Intel multimedia architecture team for IA-64, released in Intels Itanium microprocessors. Concurrent with full-time employment at HP, Dr. Lee also served as Consulting Professor of Electrical Engineering at Stanford University. Dr. Lee has a Ph.D. in Electrical Engineering and a M.S. in Computer Science, both from Stanford University, and an A.B. from Cornell University, where she was a College Scholar. She is a Fellow of ACM, a Fellow of IEEE, and a member of IS&T, Phi Beta Kappa, and Alpha Lambda Delta. She has been granted 115 U.S. and international patents, with several patent applications pending.A. Murat Fiskiran is a Ph. D. student at the Department of Electrical Engineering at Princeton University. He is a member of the Princeton Architecture Laboratory for Multimedia and Security (PALMS) and a Kodak Fellow. His research interests include computer architecture and computer security.     

Implementation of a Wireless Multimedia DSP Chip for Mobile Applications

This paper presents the implementation of a wireless multimedia DSP chip for mobile applications. The implemented DSP chip supports communication instructions for Viterbi, timing synchronization, etc. as well as multimedia instructions. The DSP can handle variable length data and perform four MACs in a cycle. The proposed DSP employs parallel processing techniques, such as SIMD, vector processing, DSP schemes and adopts low power features for wireless applications. The implemented DSP chip includes test circuits and various peripherals, such as DMA, bus arbitration, timer, etc. This chip has been modeled by Verilog HDL and implemented using the 0.35 m HCB60 library. The total gate count excluding memory is about 170,000 gates and the clock frequency is 100 MHz.Junghoo Lee received the B.S. degree in electronic engineering from Ajou University, Suwon, Korea in 2002. He is currently working toward the Ph.D. degree with School of Electrical and Computer Engineering, Ajou University. His main research interests include SOC design and application-specific DSP chip design.Myung H. Sunwoo received the B.S. degree in electronic engineering from the Sogang University in 1980, the M.S. degree in electrical and electronics from the Korea Advanced Institute of Science and Technology in 1982, and the Ph.D. degree in electrical and computer engineering from the University of Texas at Austin in 1990.He worked for Electronics and Telecommunications Research Institute (ETRI) in Daejeon, Korea from 1982 to 1985 and Digital Signal Processor Operations, Motorola, Austin, TX from 1990 to 1992. Since 1992, he has been a Professor with the School of Electrical and Computer Engineering, Ajou University in Suwon, Korea. In 2000, he was a Visiting Professor in the Department of Electrical and Computer Engineering, the University of California, Davis, CA. He is the Director of the National Research Laboratory sponsored by the Ministry of Science and Technology. His research interests include VLSI architectures, SOC design for multimedia and communications, and application-specific DSP architectures.Dr. Sunwoo has published more than 120 papers in international transactions/journals and conferences and also has 28 patents including five U.S. patents. He served as a Technical Program Chair of the IEEE Workshop on Signal Processing Systems (SIPS) in 2003 and a member of the technical program committee of various international conferences. He has received a number of research awards from the Ministry of Commerce, Industry and Energy, Samsung Electronics, and professional foundations. He served as an Associate Editor for the IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2002–2003) and as a Guest Editor for the Journal of VLSI Signal Processing (Kluwer, 2004). Currently, He is a Senior Member of IEEE and a Chair of the IEEE CAS Society of the Seoul Chapter.     

谈多媒体教学软件与其它教学方式的配合关系

介绍了在电子技术基础课程教学中使用多媒体软件的方法和体会，论述了多媒体教学方式应与传统教学方式优势互补；多媒体软件应和EDA软件相得益彰，正式出版的多媒体软件与自制软件相互补充，教师的主导作用不能削弱。     

Multimedia Execution Hardware Accelerator

In this paper we show that some expressions frequently used in multimedia applications can be formulated as a general add-multiply-add operation. We further show a hardwired implementation of the Add-Multiply-Add instruction which is no more complex than the multiplier implementation. Furthermore we show that two frequently motion estimation operations, the Sum and Mean of Absolute Differences, can be implemented in hardware requiring also approximately the same cycle time as the multiplication. We also show that our approach can be extended easily to provide the computation of the Sum and Mean of Absolute Difference of a 16×16 pixel block in no more than four machine cycles. Additionally we propose a codec hardwired mechanism for the Paeth predictor used in the Portable Network Standard (PNG) that requires at most two general purpose ALU cycles. We extend the paeth unit to include the median, maximum and minimum operations on three inputs with no additional cycle time and we also extend the Add-Multiply-Add unit to include the mean of three numbers. Finally we propose a multimedia hardware accelerator to accommodate all the proposed operations. The proposed unit is an extension of the multiply pipeline with ALU extensions with no extra stages added. The unit operates on 32 instructions in total.     

基于牛顿迭代法的快速精确的反量化算法

非线性函数广泛应用于各种多媒体压缩算法中,但在定点SOC芯片上处理这些函数比较困难,严重影响多媒体编解码性能,因此须采用近似算法代替。本文考虑了定点SOC芯片处理能力、存储空间的限制和要求,提出一种基于部分查找表和牛顿迭代法相结合的算法,给出选取牛顿迭代法的高精度初始近似值的方法,仅需迭代一次就可以达到很高精度,通过误差分析,对初始近似值进行补偿,使精度进一步提高。实验结果表明,该方法需要的存储空间比完全查找表减小了85%,误差比Chih-Hsu Yen提出的线性选择初始近似值方法减小了96%。     

基于指令表自驱动的指令解析模型实现方法研究

在硬件仿真平台的设计中,指令集解析模型的设计是关键。从对常规的指令集解析模型设计出发,分析了其主要缺陷及改进思路,并给出了一种的新的指令解析模型——基于指令表自驱动的指令解析模型,通过描述硬件仿真平台的设计过程,分析了其优化的核心策略和主要技术路线,给出了一种实现这种新的指令解析模型的方法。     

"自动控制原理"课程的探究性教学实践

本文针对目前"自动控制原理"课程教学中存在的问题,探讨了将探究性教学方法应用于教学实践的必要性和实施步骤.首先分析了"自动控制原理"课程的特点和教学现状,接着介绍了探究性教学方法的内涵,指出了本课程的探究性教学所要达到的目标,并探讨了在实践中相关的实现途径.教学实践表明,探究性教学方法提高了学生学习的积极性和主动性,培养了学生的思维能力和创新能力,进一步加深了对自动控制原理知识概念的理解,为后续课程的学习奠定了坚实的基础.     

一种用于移动通信的无线电多媒体DSP芯片的实现

叙述了一种用于移动通信的无线电多媒体DSP芯片的实现。开发出的WM DSP芯片既支持用于Viterbi、时间同步等的通信指令,也支持多媒体指令。这个DSP能够处理可变长数据,并且在一个周期里可以执行4个MAC。提出的DSP采用了并行处理技术,如SIMD、矢量处理和DSP结构,并且采用了无线电应用的低功耗特性。整个DSP芯片包括测试电路和各种外围设备,如DMA、总线仲裁、定时器等等。除了存储器之外总共大约有170 000个门电路,并且时钟频率达到了100 MHz。