Modeling of trap-assisted tunneling on performance of charge trapping memory with consideration of trap position and energy level

In this work, the trap-assisted tunneling(TAT) mechanism is modeled as a two-step physical process for charge trapping memory(CTM). The influence of the TAT mechanism on CTM performance is investigated in consideration of various trap positions and energy levels. For the simulated CTM structure, simulation results indicate that the positions of oxide traps related to the maximum TAT current contribution shift towards the substrate interface and charge storage layer interface during time evolutions in programming and retention operations, respectively. Lower programming voltage and retention operations under higher temperature are found to be more sensitive to tunneling oxide degradation.     

Carriers recombination processes in charge trapping memory cell by simulation

We have evaluated the effects of recombination processes in a charge storage layer, either between trapped electrons and trapped holes or between trapped carriers and free carriers, on charge trapping memory cell＇s performances by numerical simulation. Recombination is an indispensable mechanism in charge trapping memory. It helps charge convert process between negative and positive charges in the charge storage layer during charge trapping memory programming/erasing operation. It can affect the speed of programming and erasing operations.     

Silicon nanoparticle charge trapping memory cell

A charge trapping memory with 2 nm silicon nanoparticles (Si NPs) is demonstrated. A zinc oxide (ZnO) active layer is deposited by atomic layer deposition (ALD), preceded by Al₂O₃ which acts as the gate, blocking and tunneling oxide. Spin coating technique is used to deposit Si NPs across the sample between Al₂O₃ steps. The Si nanoparticle memory exhibits a threshold voltage (V_t) shift of 2.9 V at a negative programming voltage of –10 V indicating that holes are emitted from channel to charge trapping layer. The negligible measured V_t shift without the nanoparticles and the good re‐ tention of charges (>10 years) with Si NPs confirm that the Si NPs act as deep energy states within the bandgap of the Al₂O₃ layer. In order to determine the mechanism for hole emission, we study the effect of the electric field across the tunnel oxide on the magnitude and trend of the V_t shift. The V_t shift is only achieved at electric fields above 1 MV/cm. This high field indicates that tunneling is the main mechanism. More specifically, phonon‐assisted tunneling (PAT) dominates at electric fields between 1.2 MV/cm < E < 2.1 MV/cm, while Fowler–Nordheim tunneling leads at higher fields (E > 2.1 MV/cm). (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

缺陷对电荷俘获存储器写速度影响

基于密度泛理论的第一性原理以及VASP软件,研究了电荷俘获存储器(CTM)中俘获层HfO2在不同缺陷下(3价氧空位(VO3)、4价氧空位(VO4)、铪空位(VHf)以及间隙掺杂氧原子(IO))对写速度的影响.对比计算了HfO2在不同缺陷下对电荷的俘获能、能带偏移值以及电荷俘获密度.计算结果表明:VO3,VO4与VHf为单性俘获,IO则是双性俘获,HfO2在VHf时俘获能最大,最有利于俘获电荷;VHf时能带偏移最小,电荷隧穿进入俘获层最容易,即隧穿时间最短;同时对电荷俘获密度进行对比,表明VHf对电荷的俘获密度最大,即电荷被俘获的概率最大.通过对CTM的写操作分析以及计算结果可知,CTM俘获层m-HfO2在VHf时的写速度比其他缺陷时的写速度快.本文的研究将为提高CTM操作速度提供理论指导.     

Effects of charge storage dielectric thickness on hybrid gadolinium oxide nanocrystal and charge trapping nonvolatile memory

The characteristics of hybrid gadolinium oxide nanocrystal (Gd₂O₃-NC) and gadolinium oxide charge trapping (Gd₂O₃-CT) memories were investigated with different Gd₂O₃ film thickness. By performing the rapid thermal annealing on Gd₂O₃ films with different thickness, the Gd₂O₃-NCs with the diameter of 6–9 nm for charge storage, surrounded by the amorphous Gd₂O₃ (α-Gd₂O₃) layer, were formed. The α-Gd₂O₃ layer was considered to be the charge trapping layer, resulting in the large memory window of Gd₂O₃-NC/CT memories with thick Gd₂O₃ film. The charge trapping energy level of the Gd₂O₃-NCs and α-Gd₂O₃ layer was extracted to be 0.16 and 0.45 eV respectively by using the temperature-dependent retention measurement. Further, after a 10⁶ program/erase cycling operation, the memory with thin Gd₂O₃ film can be predicted to sustain a 94% memory window of the first cycling one while the memory with thick Gd₂O₃ film suffered from a 30% charge loss because of the traps within the α-Gd₂O₃ layer. The Gd₂O₃ film thickness of 10 nm was optimized to exhibit superior performances of the Gd₂O₃-NC/CT memory, which can be applied into the nonvolatile memory.     

High-performance amorphous In-Ga-Zn-O thin-film transistor nonvolatile memory with a novel p-SnO/n-SnO2 heterojunction charge trapping stack

Amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) memories with novel p-SnO/n-SnO₂ heterojunction charge trapping stacks (CTSs) are investigated comparatively under a maximum fabrication temperature of 280 ℃. Compared to a single p-SnO or n-SnO₂ charge trapping layer (CTL), the heterojunction CTSs can achieve electrically programmable and erasable characteristics as well as good data retention. Of the two CTSs, the tunneling layer/p-SnO/n-SnO₂/blocking layer architecture demonstrates much higher program efficiency, more robust data retention, and comparably superior erase characteristics. The resulting memory window is as large as 6.66 V after programming at 13 V/1 ms and erasing at -8 V/1 ms, and the ten-year memory window is extrapolated to be 4.41 V. This is attributed to shallow traps in p-SnO and deep traps in n-SnO₂, and the formation of a built-in electric field in the heterojunction.     

热辅助磁盘探针存储的研究

描述了一种热辅助磁盘存储技术，该技术可应用于未来的高密度磁盘存储.记录介质是一种CoNi/Pt多层膜，它可用作垂直模式的磁记录介质.使用扫描隧道显微镜(STM)产生的隧道电流作为热源对磁膜进行局部加热.隧道电流随着加在STM针尖与磁膜之间的脉冲电压幅值的增大而增大.实验结果显示了圆形记录点在磁膜上生成，记录点尺寸与电压值相关，阈值电压为4V左右.当电压高于阈值时，记录点尺寸随着电压的增大而增大,平均尺寸为170nm；当电压低于阈值时，未发现记录点.一个简单的模型解释了以上实验现象. 关键词： 扫描隧道显微镜 热辅助磁盘存储技术 高密度磁盘存储     

Performance improvement of charge trap flash memory by using a composition-modulated high-k trapping layer

A composition-modulated （HfO2）x（Al2O3）1-x charge trapping layer is proposed for charge trap flash memory by controlling the A1 atom content to form a peak and valley shaped band gap. It is found that the memory device using the composition-modulated （HfO2）x（Al2O3）l-x as the charge trapping layer exhibits a larger memory window of 11.5 V, improves data retention even at high temperature, and enhances the program/erase speed. Improvements of the memory characteristics are attributed to the special band-gap structure resulting from the composition-modulated trapping layer. Therefore, the composition-modulated charge trapping layer may be useful in future nonvolatile flash memory device application.     

Reduction of charge trapping in HfO2 film on a Ge substrate by trimethylaluminum pretreatment

Trimethylaluminum pretreatment prior to HfO₂ deposition is introduced for native oxide reduction. It is identified that the trimethylaluminum pretreatment could effectively reduce native oxide, which is transformed to an aluminum oxide interfacial layer. Formation of the thin aluminum oxide layer suppresses Ge diffusion into HfO₂, reducing hysteresis in the ca‐ pacitance–voltage curve. Moreover, the device reliability of the trimethylaluminum pretreated sample is improved in a constant current stress test. This work indicates that trimethylaluminum pretreatment is an effective in‐situ method for the gate dielectric stack formation to reduce charge trapping in the HfO₂ film on a Ge substrate. (© 2012 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)     

Dependence of charge trapping of fluorescent and phosphorescent dopants in organic light-emitting diodes on the dye species and current density

This paper utilizes multilayer organic light-emitting diodes with a thin layer of dye molecules to study the mechanism of charge trapping under different electric regimes. It demonstrates that the carrier trapping was independent of the current density in devices using fluorescent material as the emitting molecule while this process was exactly opposite when phosphorescent material was used. The triplet--triplet annihilation and dissociation of excitons into free charge carriers was considered to contribute to the decrease in phosphorescent emission under high electric fields. Moreover, the fluorescent dye molecule with a lower energy gap and ionized potential than the host emitter was observed to facilitate the carrier trapping mechanism, and it would produce photon emission.     

Al掺杂对HfO2俘获层可靠性影响第一性原理研究

采用基于MS(Materials Studio)软件和密度泛函理论的第一性原理方法, 研究了HfO₂ 俘获层的电荷俘获式存储器(Charge Trapping Memory, CTM)中电荷的保持特性以及耐擦写性. 在对单斜晶HfO₂中四配位氧空位(V_O4) 缺陷和V_O4 与Al替位Hf掺杂的共存缺陷体(Al+V_O4)两种超晶胞模型进行优化之后, 分别计算了其相互作用能、形成能、Bader电荷、态密度以及缺陷俘获能. 相互作用能和形成能的计算结果表明共存缺陷体中当两种缺陷之间的距离为2.216 Å时, 结构最稳定、缺陷最容易形成; 俘获能计算结果表明, 共存缺陷体为双性俘获, 且与V_O4缺陷相比, 俘获能显著增大; Bader电荷分析表明共存缺陷体更有利于电荷保持; 态密度的结果说明共存缺陷体对空穴的局域能影响较强; 计算两种模型擦写电子前后的能量变化表明共存缺陷体的耐擦写性明显得到了改善. 因此在HfO₂俘获层中可以通过加入Al杂质来改善存储器的保持特性和耐擦写性. 本文的研究可为改善CTM数据保持特性和耐擦写性提供一定的理论指导.     

Effect of charge order transition on tunneling resistance in Pr_(0.6)Ca_(0.4)MnO_3/Nb-doped SrTiO_3 heterojunction

An oxide p–n heterojunction composed of Pr0.6Ca0.4MnO3film, with a charge order(CO) transition, and 1wt% Nbdoped SrTiO3substrate is fabricated, and the transport properties of the interface are experimentally studied. The rectifying behavior of the junction, well described by the Newman equation, is observed, indicating that tunneling is the dominant process by which the carriers pass through the interface. Above and below the CO transition temperature, satisfactory linear dependencies of junction resistance on temperature are observed, but the slopes of the two resistance-temperature relations are different. The CO process is believed to be relevant to this difference.     

Comparison between N2 and O2 anneals on the integrity of an Al2O3/SiaN4/SiO2/Si memory gate stack

In this paper the endurance characteristics and trap generation are investigated to study the effects of different postdeposition anneals （PDAs） on the integrity of an Al2O3/Si3N4/SiOz/Si memory gate stack. The flat-band voltage （Vfb） turnarounds are observed in both the programmed and erased states of the N2-PDA device. In contrast, this turnaround is observed only in the erased state of the O2-PDA device. The Vfb in the programmed state of the O2-PDA device keeps increasing with increasing program/erase （P/E） cycles. Through the analyses of endurance characteristics and the low voltage round-trip current transients, it is concluded that in both kinds of device there are an unknown type of pre-existing characteristic deep traps and P/E stress-induced positive oxide charges. In the O2-PDA device two extra types of trap are also found： the pre-existing border traps and the P/E stress-induced negative traps. Based on these four types of defects we can explain the endurance characteristics of two kinds of device. The switching property of pre-existing characteristic deep traps is also discussed.     

Comparison between N_2 and O_2 anneals on the integrity of an Al_2O_3/Si_3N_4/SiO_2/Si memory gate stack

In this paper the endurance characteristics and trap generation are investigated to study the effects of different postdeposition anneals(PDAs) on the integrity of an Al2O3/Si3N4/SiO2/Si memory gate stack. The flat-band voltage(Vfb)turnarounds are observed in both the programmed and erased states of the N2-PDA device. In contrast, this turnaround is observed only in the erased state of the O2-PDA device. The Vfbin the programmed state of the O2-PDA device keeps increasing with increasing program/erase(P/E) cycles. Through the analyses of endurance characteristics and the low voltage round-trip current transients, it is concluded that in both kinds of device there are an unknown type of pre-existing characteristic deep traps and P/E stress-induced positive oxide charges. In the O2-PDA device two extra types of trap are also found: the pre-existing border traps and the P/E stress-induced negative traps. Based on these four types of defects we can explain the endurance characteristics of two kinds of device. The switching property of pre-existing characteristic deep traps is also discussed.     

宏观电偶极子对聚丙烯铁电驻极体膜电荷储存及其动态特性的影响

利用栅控恒压电晕充电组合反极性电晕补偿充电法，研究了孔洞(单元电畴)内分布的空间电荷型宏观电偶极子的形成，及其增长对聚丙烯孔洞膜电极化期间的电流特性及电导率的影响. 借助等温表面电位衰减测量、开路和短路热刺激放电电流谱分析等，讨论了宏观电偶极子及其密度变化时的聚丙烯孔洞驻极体膜电荷储存稳定性及电荷动态特性. 实验结果说明：由电极化形成的宏观电偶极子的自身电场提高了聚丙烯孔洞驻极体膜的电导率，从而降低了驻极体膜电荷储存的稳定性. 对呈现弱极化强度的孔洞驻极体膜，以孔洞为畴结构基本单元内的宏观电偶极子，其两性空间电荷的大部分仅仅分别沉积在透镜状孔洞上下两壁的两端. 外激发脱阱电荷从脱阱位置的输运路径，主要是绕孔洞两边沿介质层迁移；而极化强度较高的样品，其两性电荷则分别分布在上下两壁的宽广区域内，脱阱电荷的大部分在驻极体电场驱动下从脱阱位置通过孔洞层间的介质层迁移并衰减.     

克尔介质中脉冲宽度对瞬态热光非线性效应的影响

在纳秒时域，研究了激光脉冲宽度变化对克尔介质中瞬态热光非 线性效应的影响.通过不同脉冲宽度τp下得到的二硫化碳 苯胺黑溶液的Z_scan实验结果，对瞬态热光非线性效应和光克尔效应的共存过程进行了分析 .随着脉冲宽度的增加，观察到了热光非线性效应从瞬态到稳态变化过程和Z_scan峰谷特性 的转变.同时，从声波的传播方程和光波的非线性传播方程出发，用数值计算方法模拟了这 一非线性过程，结果表明数值模拟结果和实验结果是相符的. 关键词： 瞬态热光非线性效应 脉冲宽度 Z_scan 克尔效应     

Photonic nanostructures for advanced light trapping in silicon solar cells: the impact of etching on the material electronic quality

Dry plasma etching, commonly used by the Photonics community as the etching technique for the fabrication of photonic nanostructures, could be a source of device performance limitations when used in the frame of silicon photovoltaics. So far, the lack of silicon solar cells with state‐of‐the‐art efficiencies utilizing nanophotonic concepts shows how challenging their integration is, owing to the trade‐off between optical and electrical properties. In this study we show that dry plasma etching results in the degradation of the silicon material quality due to (i) a high density of dangling bonds and (ii) the presence of sub‐surface defects, resulting in high surface recombination velocities and low minority carrier lifetimes. On the contrary, wet chemical anisotropic etching used as an alternative, leads to the formation of inverted nanopyramids that result in low surface recombination velocity and low density of dangling bonds. The proposed inverted nanopyramids could enable high efficiency photonic assisted solar cells by offering the potential to achieve higher short‐circuit current without degrading the open circuit voltage. (© 2016 WILEY‐VCH Verlag GmbH &Co. KGaA, Weinheim)     

流量大小对混合流场特性等的影响

 在主、副气流各组份的流量比不变的情况下，改变输入氧碘化学激光器（COIL）光腔总气流流量，数值模拟给出了COIL拉伐尔喷管主、副气流混合状况和各物理量的分布等，通过对这些结果进行对比分析得出：输入COIL光腔总气流流量增加三倍，氧碘气流的混合状况稍稍变差，但Mach数和密度等的分布和变化规律基本不变。     

The influence of impurities on the quasiparticle tunneling current between weakly coupled quasi-one-dimensional charge density waves

The dc and ac conductivity of a tunneling junction between two impure quasi-one-dimensional charge density wave (CDW) systems is calculated. The non-magnetic impurities are considered in the self-consistent Born approximation (SCBA). Impurities modify the density of states (DOS) of the pure CDW system for quasiparticles inside the energy region of the gap 2(T). As in the pure case, the theory predicts in addition to a tunneling current which is proportional to the product of the DOS a term proportional to the cosine of the order parameter phase difference. In the case of a normal state/CDW junction, analytical expressions are obtained forT=0 showing deviations from the pure case. The linear ac conductivity is obtained by the scaling relation between the dc and the ac response.     

流量大小对混合流场特性等的影响

在主、副气流各组份的流量比不变的情况下,改变输入氧碘化学激光器(COIL)光腔总气流流量,数值模拟给出了COIL拉伐尔喷管主、副气流混合状况和各物理量的分布等,通过对这些结果进行对比分析得出输入COIL光腔总气流流量增加三倍,氧碘气流的混合状况稍稍变差,但Mach数和密度等的分布和变化规律基本不变.